From patchwork Mon Oct 16 15:27:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Michael S. Tsirkin" X-Patchwork-Id: 10008919 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 47A60601E7 for ; Mon, 16 Oct 2017 15:29:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 00A5028174 for ; Mon, 16 Oct 2017 15:29:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E9748284C9; Mon, 16 Oct 2017 15:29:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8A167284B9 for ; Mon, 16 Oct 2017 15:29:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754169AbdJPP2f (ORCPT ); Mon, 16 Oct 2017 11:28:35 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43070 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754093AbdJPP2d (ORCPT ); Mon, 16 Oct 2017 11:28:33 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id F079E13A49; Mon, 16 Oct 2017 15:28:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com F079E13A49 Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=mst@redhat.com Received: from redhat.com (dhcp-17-88.bos.redhat.com [10.18.17.88]) by smtp.corp.redhat.com (Postfix) with SMTP id F04556A8E1; Mon, 16 Oct 2017 15:28:30 +0000 (UTC) Date: Mon, 16 Oct 2017 18:27:52 +0300 From: "Michael S. Tsirkin" To: Bart Van Assche Cc: "hch@lst.de" , "linux-kernel@vger.kernel.org" , "torvalds@linux-foundation.org" , qla2xxx-upstream@qlogic.com, "James E.J. Bottomley" , "Martin K. Petersen" , linux-scsi@vger.kernel.org Subject: Re: [PATCH] linux/types.h: Restore the ability to disable sparse endianness checks Message-ID: <20171016181159-mutt-send-email-mst@kernel.org> References: <20171006172353.16758-1-bart.vanassche@wdc.com> <20171009162008-mutt-send-email-mst@kernel.org> <1507561661.2674.3.camel@wdc.com> <20171009204139-mutt-send-email-mst@kernel.org> <1507653494.2815.27.camel@wdc.com> <20171016160316-mutt-send-email-mst@kernel.org> <1508162253.2728.1.camel@wdc.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1508162253.2728.1.camel@wdc.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Mon, 16 Oct 2017 15:28:33 +0000 (UTC) Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Mon, Oct 16, 2017 at 01:57:35PM +0000, Bart Van Assche wrote: > On Mon, 2017-10-16 at 16:34 +0300, Michael S. Tsirkin wrote: > > I don't see how it'll help make things better. OTOH if the specific > > drivers are tagged in the makefile, they can be gradually moved out to > > staging or something to help trigger action. > > Do you really want to move drivers like qla2xxx to staging? That driver is > important to multiple enterprise distro's. > > Bart. Frankly I'm surprised this one has sparse issues. Really e.g. drivers/scsi/qla2xxx/qla_nvme.h is new from June 2017. It's not some ancient piece of code that no one understands so we are afraid to touch it. So if you care, why don't you just fix it up? I suspect it's a question of just tagging structure fields properly. Here's a patch fixing up one of the files in that driver. ---> qla2xxx: make qla_nvme sparse clean Without looking into what it actually does, just add annotations so sparse does not complain. Separately, the handle field in cmd_nvme which isn't tagged as LE should be examined for endian-ness by someone who understands this hardware. If it actually needs to be native endian, a comment explaining why would be a good idea. Similarly for cur_dsd which seems to mix LE and native data. Signed-off-by: Michael S. Tsirkin diff --git a/drivers/scsi/qla2xxx/qla_nvme.c b/drivers/scsi/qla2xxx/qla_nvme.c index f3710a7..05ab549 100644 --- a/drivers/scsi/qla2xxx/qla_nvme.c +++ b/drivers/scsi/qla2xxx/qla_nvme.c @@ -442,7 +442,7 @@ static int qla2x00_start_nvme_mq(srb_t *sp) req->ring_ptr++; } cont_pkt = (cont_a64_entry_t *)req->ring_ptr; - *((uint32_t *)(&cont_pkt->entry_type)) = + *((__le32 *)(&cont_pkt->entry_type)) = cpu_to_le32(CONTINUE_A64_TYPE); cur_dsd = (uint32_t *)cont_pkt->dseg_0_address; @@ -450,9 +450,9 @@ static int qla2x00_start_nvme_mq(srb_t *sp) } sle_dma = sg_dma_address(sg); - *cur_dsd++ = cpu_to_le32(LSD(sle_dma)); - *cur_dsd++ = cpu_to_le32(MSD(sle_dma)); - *cur_dsd++ = cpu_to_le32(sg_dma_len(sg)); + *(__le32 __force *)cur_dsd++ = cpu_to_le32(LSD(sle_dma)); + *(__le32 __force *)cur_dsd++ = cpu_to_le32(MSD(sle_dma)); + *(__le32 __force *)cur_dsd++ = cpu_to_le32(sg_dma_len(sg)); avail_dsds--; } diff --git a/drivers/scsi/qla2xxx/qla_nvme.h b/drivers/scsi/qla2xxx/qla_nvme.h index dfe56f2..da58bd1 100644 --- a/drivers/scsi/qla2xxx/qla_nvme.h +++ b/drivers/scsi/qla2xxx/qla_nvme.h @@ -39,32 +39,32 @@ struct cmd_nvme { uint8_t entry_status; /* Entry Status. */ uint32_t handle; /* System handle. */ - uint16_t nport_handle; /* N_PORT handle. */ - uint16_t timeout; /* Command timeout. */ + __le16 nport_handle; /* N_PORT handle. */ + __le16 timeout; /* Command timeout. */ - uint16_t dseg_count; /* Data segment count. */ - uint16_t nvme_rsp_dsd_len; /* NVMe RSP DSD length */ + __le16 dseg_count; /* Data segment count. */ + __le16 nvme_rsp_dsd_len; /* NVMe RSP DSD length */ uint64_t rsvd; - uint16_t control_flags; /* Control Flags */ + __le16 control_flags; /* Control Flags */ #define CF_NVME_ENABLE BIT_9 #define CF_DIF_SEG_DESCR_ENABLE BIT_3 #define CF_DATA_SEG_DESCR_ENABLE BIT_2 #define CF_READ_DATA BIT_1 #define CF_WRITE_DATA BIT_0 - uint16_t nvme_cmnd_dseg_len; /* Data segment length. */ - uint32_t nvme_cmnd_dseg_address[2]; /* Data segment address. */ - uint32_t nvme_rsp_dseg_address[2]; /* Data segment address. */ + __le16 nvme_cmnd_dseg_len; /* Data segment length. */ + __le32 nvme_cmnd_dseg_address[2]; /* Data segment address. */ + __le32 nvme_rsp_dseg_address[2]; /* Data segment address. */ - uint32_t byte_count; /* Total byte count. */ + __le32 byte_count; /* Total byte count. */ uint8_t port_id[3]; /* PortID of destination port. */ uint8_t vp_index; - uint32_t nvme_data_dseg_address[2]; /* Data segment address. */ - uint32_t nvme_data_dseg_len; /* Data segment length. */ + __le32 nvme_data_dseg_address[2]; /* Data segment address. */ + __le32 nvme_data_dseg_len; /* Data segment length. */ }; #define PT_LS4_REQUEST 0x89 /* Link Service pass-through IOCB (request) */