From patchwork Wed Feb 14 18:10:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 10219597 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CEA3A60467 for ; Wed, 14 Feb 2018 18:10:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A9EC629004 for ; Wed, 14 Feb 2018 18:10:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9E6BD29020; Wed, 14 Feb 2018 18:10:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1315E29004 for ; Wed, 14 Feb 2018 18:10:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161704AbeBNSKj (ORCPT ); Wed, 14 Feb 2018 13:10:39 -0500 Received: from mga11.intel.com ([192.55.52.93]:58285 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1161606AbeBNSKj (ORCPT ); Wed, 14 Feb 2018 13:10:39 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Feb 2018 10:10:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,513,1511856000"; d="scan'208";a="201142294" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga005.jf.intel.com with ESMTP; 14 Feb 2018 10:10:36 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 252F4C5; Wed, 14 Feb 2018 20:10:34 +0200 (EET) From: Andy Shevchenko To: Sathya Prakash , Chaitra P B , Suganath Prabu Subramani , MPT-FusionLinux.pdl@broadcom.com, "James E.J. Bottomley" , "Martin K. Petersen" , linux-scsi@vger.kernel.org Cc: Andy Shevchenko Subject: [PATCH v1] scsi: mpt3sas: Use lo_hi_writeq() helper Date: Wed, 14 Feb 2018 20:10:34 +0200 Message-Id: <20180214181034.36529-1-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.15.1 Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Since we have a writeq() for 32-bit architectures as provided by IO non-atomic helpers, there is no need to open code it. Moreover sparse complains about this: drivers/scsi/mpt3sas/mpt3sas_base.c:2975:16: expected unsigned long long val drivers/scsi/mpt3sas/mpt3sas_base.c:2975:16: got restricted __le64 Fixing this by replacing custom writeq() with one provided by io-64-nonatomic-lo-hi.h header. Reported-by: kbuild test robot Signed-off-by: Andy Shevchenko --- drivers/scsi/mpt3sas/mpt3sas_base.c | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c b/drivers/scsi/mpt3sas/mpt3sas_base.c index 59a87ca328d3..a92ab4a801d7 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.c +++ b/drivers/scsi/mpt3sas/mpt3sas_base.c @@ -56,6 +56,7 @@ #include #include #include +#include #include #include #include @@ -2968,16 +2969,9 @@ mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid) * @writeq_lock: spin lock * * Glue for handling an atomic 64 bit word to MMIO. This special handling takes - * care of 32 bit environment where its not quarenteed to send the entire word + * care of 32 bit environment where its not guaranteed to send the entire word * in one transfer. */ -#if defined(writeq) && defined(CONFIG_64BIT) -static inline void -_base_writeq(__u64 b, volatile void __iomem *addr, spinlock_t *writeq_lock) -{ - writeq(cpu_to_le64(b), addr); -} -#else static inline void _base_writeq(__u64 b, volatile void __iomem *addr, spinlock_t *writeq_lock) { @@ -2985,11 +2979,9 @@ _base_writeq(__u64 b, volatile void __iomem *addr, spinlock_t *writeq_lock) __u64 data_out = cpu_to_le64(b); spin_lock_irqsave(writeq_lock, flags); - writel((u32)(data_out), addr); - writel((u32)(data_out >> 32), (addr + 4)); + writeq(data_out, addr); spin_unlock_irqrestore(writeq_lock, flags); } -#endif /** * _base_put_smid_scsi_io - send SCSI_IO request to firmware