diff mbox series

[v1] scsi: ufs: add wmb after clear interrupt status

Message ID 20211001075549.7313-1-peter.wang@mediatek.com (mailing list archive)
State Deferred
Headers show
Series [v1] scsi: ufs: add wmb after clear interrupt status | expand

Commit Message

Peter Wang (王信友) Oct. 1, 2021, 7:55 a.m. UTC 
From: Peter Wang <peter.wang@mediatek.com>

Write IS(0x20) to clear interrupts should be done before
read UTRLDBR(0x58) or UTRLCNR(0x64).
If optimize lead to read TRLDBR(0x58) or UTRLCNR(0x64) before
Write IS(0x20), the final complete task may miss.

Signed-off-by: Peter Wang <peter.wang@mediatek.com>
---
 drivers/scsi/ufs/ufshcd.c | 4 ++++
 1 file changed, 4 insertions(+)
diff mbox series

Patch

diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 3841ab49f556..3318b3b6c916 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -6492,6 +6492,10 @@  static irqreturn_t ufshcd_intr(int irq, void *__hba)
 		enabled_intr_status =
 			intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
 		ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
+
+		/* Make sure interrupt status are clear before service */
+		wmb();
+
 		if (enabled_intr_status)
 			retval |= ufshcd_sl_intr(hba, enabled_intr_status);