| Message ID | 20220603110524.1997825-7-yoshihiro.shimoda.uh@renesas.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | treewide: ufs: Add support for Renesas R-Car UFS controller | expand |
Hi Shimoda-san, On Fri, Jun 3, 2022 at 1:05 PM Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> wrote: > Add UFS node for R-Car S4-8 (r8a779f0). > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Now the binding/driver parts have been accepted, I will queue this patch in renesas-devel for v5.20, with the ufs30-clk node moved, to preserve alphabetical sort order. > --- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi > @@ -40,6 +40,13 @@ extalr_clk: extalr { > clock-frequency = <0>; > }; > > + ufs30_clk: ufs30-clk { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + /* This value must be overridden by the board */ > + clock-frequency = <0>; > + }; > + > pmu_a55 { > compatible = "arm,cortex-a55-pmu"; > interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; > @@ -259,6 +266,18 @@ i2c5: i2c@e66e0000 { > status = "disabled"; > }; > > + ufs: ufs@e6860000 { > + compatible = "renesas,r8a779f0-ufs"; > + reg = <0 0xe6860000 0 0x100>; > + interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 1514>, <&ufs30_clk>; > + clock-names = "fck", "ref_clk"; > + freq-table-hz = <200000000 200000000>, <38400000 38400000>; > + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; > + resets = <&cpg 1514>; > + status = "disabled"; > + }; > + > scif3: serial@e6c50000 { > compatible = "renesas,scif-r8a779f0", > "renesas,rcar-gen4-scif", "renesas,scif"; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi index df46fb87cffc..155a7ee8dae4 100644 --- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi @@ -40,6 +40,13 @@ extalr_clk: extalr { clock-frequency = <0>; }; + ufs30_clk: ufs30-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + pmu_a55 { compatible = "arm,cortex-a55-pmu"; interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; @@ -259,6 +266,18 @@ i2c5: i2c@e66e0000 { status = "disabled"; }; + ufs: ufs@e6860000 { + compatible = "renesas,r8a779f0-ufs"; + reg = <0 0xe6860000 0 0x100>; + interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 1514>, <&ufs30_clk>; + clock-names = "fck", "ref_clk"; + freq-table-hz = <200000000 200000000>, <38400000 38400000>; + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; + resets = <&cpg 1514>; + status = "disabled"; + }; + scif3: serial@e6c50000 { compatible = "renesas,scif-r8a779f0", "renesas,rcar-gen4-scif", "renesas,scif";