diff mbox series

[10/10] scsi: pm8001: Remove PM8001_READ_VPD

Message ID 20230911030207.242917-11-dlemoal@kernel.org (mailing list archive)
State Superseded
Headers show
Series scsi: pm8001: Bug fix and cleanup | expand

Commit Message

Damien Le Moal Sept. 11, 2023, 3:02 a.m. UTC
Remove the macro PM8001_READ_VPD used to define if a controller WWN
should be retrieved from the device. Instead, define the better named
boolean module parameter "read_wwn" to control this.

Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
---
 drivers/scsi/pm8001/pm8001_init.c | 46 ++++++++++++++++++-------------
 drivers/scsi/pm8001/pm8001_sas.h  |  3 --
 2 files changed, 27 insertions(+), 22 deletions(-)

Comments

kernel test robot Sept. 11, 2023, 1:44 p.m. UTC | #1
Hi Damien,

kernel test robot noticed the following build warnings:

[auto build test WARNING on linus/master]
[also build test WARNING on v6.6-rc1 next-20230911]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Damien-Le-Moal/scsi-pm8001-Setup-IRQs-on-resume/20230911-110427
base:   linus/master
patch link:    https://lore.kernel.org/r/20230911030207.242917-11-dlemoal%40kernel.org
patch subject: [PATCH 10/10] scsi: pm8001: Remove PM8001_READ_VPD
config: i386-randconfig-063-20230911 (https://download.01.org/0day-ci/archive/20230911/202309112107.YfM4eB8f-lkp@intel.com/config)
compiler: gcc-11 (Debian 11.3.0-12) 11.3.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20230911/202309112107.YfM4eB8f-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202309112107.YfM4eB8f-lkp@intel.com/

sparse warnings: (new ones prefixed by >>)
>> drivers/scsi/pm8001/pm8001_init.c:696:56: sparse: sparse: incorrect type in assignment (different base types) @@     expected unsigned long long [usertype] dev_sas_addr @@     got restricted __be64 [usertype] @@
   drivers/scsi/pm8001/pm8001_init.c:696:56: sparse:     expected unsigned long long [usertype] dev_sas_addr
   drivers/scsi/pm8001/pm8001_init.c:696:56: sparse:     got restricted __be64 [usertype]

vim +696 drivers/scsi/pm8001/pm8001_init.c

   680	
   681	/**
   682	 * pm8001_init_sas_add - initialize sas address
   683	 * @pm8001_ha: our ha struct.
   684	 *
   685	 * Currently we just set the fixed SAS address to our HBA, for manufacture,
   686	 * it should read from the EEPROM
   687	 */
   688	static int pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
   689	{
   690		u8 i, j;
   691		u8 sas_add[8];
   692	
   693		if (!pm8001_read_wwn) {
   694			for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
   695				pm8001_ha->phy[i].dev_sas_addr = 0x50010c600047f9d0ULL;
 > 696				pm8001_ha->phy[i].dev_sas_addr =
   697					cpu_to_be64((u64)
   698						(*(u64 *)&pm8001_ha->phy[i].dev_sas_addr));
   699			}
   700			memcpy(pm8001_ha->sas_addr, &pm8001_ha->phy[0].dev_sas_addr,
   701			       SAS_ADDR_SIZE);
   702			return 0;
   703		}
   704	
   705		/*
   706		 * For new SPC controllers WWN is stored in flash vpd. For SPC/SPCve
   707		 * controllers WWN is stored in EEPROM. And for Older SPC WWN is stored
   708		 * in NVMD.
   709		 */
   710		DECLARE_COMPLETION_ONSTACK(completion);
   711		struct pm8001_ioctl_payload payload;
   712		u16 deviceid;
   713		int rc;
   714		unsigned long time_remaining;
   715	
   716		if (PM8001_CHIP_DISP->fatal_errors(pm8001_ha)) {
   717			pm8001_dbg(pm8001_ha, FAIL, "controller is in fatal error state\n");
   718			return -EIO;
   719		}
   720	
   721		pci_read_config_word(pm8001_ha->pdev, PCI_DEVICE_ID, &deviceid);
   722		pm8001_ha->nvmd_completion = &completion;
   723	
   724		if (pm8001_ha->chip_id == chip_8001) {
   725			if (deviceid == 0x8081 || deviceid == 0x0042) {
   726				payload.minor_function = 4;
   727				payload.rd_length = 4096;
   728			} else {
   729				payload.minor_function = 0;
   730				payload.rd_length = 128;
   731			}
   732		} else if ((pm8001_ha->chip_id == chip_8070 ||
   733				pm8001_ha->chip_id == chip_8072) &&
   734				pm8001_ha->pdev->subsystem_vendor == PCI_VENDOR_ID_ATTO) {
   735			payload.minor_function = 4;
   736			payload.rd_length = 4096;
   737		} else {
   738			payload.minor_function = 1;
   739			payload.rd_length = 4096;
   740		}
   741		payload.offset = 0;
   742		payload.func_specific = kzalloc(payload.rd_length, GFP_KERNEL);
   743		if (!payload.func_specific) {
   744			pm8001_dbg(pm8001_ha, FAIL, "mem alloc fail\n");
   745			return -ENOMEM;
   746		}
   747		rc = PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload);
   748		if (rc) {
   749			kfree(payload.func_specific);
   750			pm8001_dbg(pm8001_ha, FAIL, "nvmd failed\n");
   751			return -EIO;
   752		}
   753		time_remaining = wait_for_completion_timeout(&completion,
   754					msecs_to_jiffies(60*1000)); // 1 min
   755		if (!time_remaining) {
   756			kfree(payload.func_specific);
   757			pm8001_dbg(pm8001_ha, FAIL, "get_nvmd_req timeout\n");
   758			return -EIO;
   759		}
   760	
   761	
   762		for (i = 0, j = 0; i <= 7; i++, j++) {
   763			if (pm8001_ha->chip_id == chip_8001) {
   764				if (deviceid == 0x8081)
   765					pm8001_ha->sas_addr[j] =
   766						payload.func_specific[0x704 + i];
   767				else if (deviceid == 0x0042)
   768					pm8001_ha->sas_addr[j] =
   769						payload.func_specific[0x010 + i];
   770			} else if ((pm8001_ha->chip_id == chip_8070 ||
   771					pm8001_ha->chip_id == chip_8072) &&
   772					pm8001_ha->pdev->subsystem_vendor == PCI_VENDOR_ID_ATTO) {
   773				pm8001_ha->sas_addr[j] =
   774						payload.func_specific[0x010 + i];
   775			} else
   776				pm8001_ha->sas_addr[j] =
   777						payload.func_specific[0x804 + i];
   778		}
   779		memcpy(sas_add, pm8001_ha->sas_addr, SAS_ADDR_SIZE);
   780		for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
   781			if (i && ((i % 4) == 0))
   782				sas_add[7] = sas_add[7] + 4;
   783			memcpy(&pm8001_ha->phy[i].dev_sas_addr,
   784				sas_add, SAS_ADDR_SIZE);
   785			pm8001_dbg(pm8001_ha, INIT, "phy %d sas_addr = %016llx\n", i,
   786				   pm8001_ha->phy[i].dev_sas_addr);
   787		}
   788		kfree(payload.func_specific);
   789	
   790		return 0;
   791	}
   792
diff mbox series

Patch

diff --git a/drivers/scsi/pm8001/pm8001_init.c b/drivers/scsi/pm8001/pm8001_init.c
index 78c22421d6fe..52dcb95898fb 100644
--- a/drivers/scsi/pm8001/pm8001_init.c
+++ b/drivers/scsi/pm8001/pm8001_init.c
@@ -64,6 +64,10 @@  static bool pm8001_use_tasklet = true;
 module_param_named(use_tasklet, pm8001_use_tasklet, bool, 0444);
 MODULE_PARM_DESC(zoned, "Use MSIX interrupts. Default: true");
 
+static bool pm8001_read_wwn = true;
+module_param_named(read_wwn, pm8001_read_wwn, bool, 0444);
+MODULE_PARM_DESC(zoned, "Get WWN from the controller. Default: true");
+
 static struct scsi_transport_template *pm8001_stt;
 static int pm8001_init_ccb_tag(struct pm8001_hba_info *);
 
@@ -685,11 +689,24 @@  static int pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
 {
 	u8 i, j;
 	u8 sas_add[8];
-#ifdef PM8001_READ_VPD
-	/* For new SPC controllers WWN is stored in flash vpd
-	*  For SPC/SPCve controllers WWN is stored in EEPROM
-	*  For Older SPC WWN is stored in NVMD
-	*/
+
+	if (!pm8001_read_wwn) {
+		for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
+			pm8001_ha->phy[i].dev_sas_addr = 0x50010c600047f9d0ULL;
+			pm8001_ha->phy[i].dev_sas_addr =
+				cpu_to_be64((u64)
+					(*(u64 *)&pm8001_ha->phy[i].dev_sas_addr));
+		}
+		memcpy(pm8001_ha->sas_addr, &pm8001_ha->phy[0].dev_sas_addr,
+		       SAS_ADDR_SIZE);
+		return 0;
+	}
+
+	/*
+	 * For new SPC controllers WWN is stored in flash vpd. For SPC/SPCve
+	 * controllers WWN is stored in EEPROM. And for Older SPC WWN is stored
+	 * in NVMD.
+	 */
 	DECLARE_COMPLETION_ONSTACK(completion);
 	struct pm8001_ioctl_payload payload;
 	u16 deviceid;
@@ -769,16 +786,7 @@  static int pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
 			   pm8001_ha->phy[i].dev_sas_addr);
 	}
 	kfree(payload.func_specific);
-#else
-	for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
-		pm8001_ha->phy[i].dev_sas_addr = 0x50010c600047f9d0ULL;
-		pm8001_ha->phy[i].dev_sas_addr =
-			cpu_to_be64((u64)
-				(*(u64 *)&pm8001_ha->phy[i].dev_sas_addr));
-	}
-	memcpy(pm8001_ha->sas_addr, &pm8001_ha->phy[0].dev_sas_addr,
-		SAS_ADDR_SIZE);
-#endif
+
 	return 0;
 }
 
@@ -788,13 +796,13 @@  static int pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
  */
 static int pm8001_get_phy_settings_info(struct pm8001_hba_info *pm8001_ha)
 {
-
-#ifdef PM8001_READ_VPD
-	/*OPTION ROM FLASH read for the SPC cards */
 	DECLARE_COMPLETION_ONSTACK(completion);
 	struct pm8001_ioctl_payload payload;
 	int rc;
 
+	if (!pm8001_read_wwn)
+		return 0;
+
 	pm8001_ha->nvmd_completion = &completion;
 	/* SAS ADDRESS read from flash / EEPROM */
 	payload.minor_function = 6;
@@ -813,7 +821,7 @@  static int pm8001_get_phy_settings_info(struct pm8001_hba_info *pm8001_ha)
 	wait_for_completion(&completion);
 	pm8001_set_phy_profile(pm8001_ha, sizeof(u8), payload.func_specific);
 	kfree(payload.func_specific);
-#endif
+
 	return 0;
 }
 
diff --git a/drivers/scsi/pm8001/pm8001_sas.h b/drivers/scsi/pm8001/pm8001_sas.h
index e14c6668b0d3..3ccb7371902f 100644
--- a/drivers/scsi/pm8001/pm8001_sas.h
+++ b/drivers/scsi/pm8001/pm8001_sas.h
@@ -85,9 +85,6 @@  do {									\
 
 extern bool pm8001_use_msix;
 
-#define PM8001_READ_VPD
-
-
 #define IS_SPCV_12G(dev)	((dev->device == 0X8074)		\
 				|| (dev->device == 0X8076)		\
 				|| (dev->device == 0X8077)		\