diff mbox series

[v1,4/7] ufs: host: mediatek: ufs mtk sip command reconstruct

Message ID 20240308070241.9163-5-peter.wang@mediatek.com (mailing list archive)
State Superseded
Headers show
Series ufs: host: mediatek: Provide features and fixes in MediaTek platforms | expand

Commit Message

Peter Wang (王信友) March 8, 2024, 7:02 a.m. UTC 
From: Peter Wang <peter.wang@mediatek.com>

From: Po-Wen Kao <powen.kao@mediatek.com>

Move sip command and define to a new sip header file.

Reviewed-by: Peter Wang <peter.wang@mediatek.com>
Signed-off-by: Peter Wang <peter.wang@mediatek.com>
Signed-off-by: Po-Wen Kao <powen.kao@mediatek.com>
---
 drivers/ufs/host/ufs-mediatek-sip.h | 90 +++++++++++++++++++++++++++++
 drivers/ufs/host/ufs-mediatek.c     |  3 +-
 drivers/ufs/host/ufs-mediatek.h     | 79 -------------------------
 3 files changed, 92 insertions(+), 80 deletions(-)
 create mode 100755 drivers/ufs/host/ufs-mediatek-sip.h

Comments

Bart Van Assche March 15, 2024, 2:36 a.m. UTC | #1 
On 3/7/24 23:02, peter.wang@mediatek.com wrote:
> +/*
> + * SiP commands
> + */

An additional comment that explains what "SiP" means would be welcome.

Thanks,

Bart.
Chun-Hung Wu (巫駿宏) March 15, 2024, 2:36 a.m. UTC | #2 
On Fri, 2024-03-08 at 15:02 +0800, peter.wang@mediatek.com wrote:
> From: Peter Wang <peter.wang@mediatek.com>
> 
> From: Po-Wen Kao <powen.kao@mediatek.com>
> 
> Move sip command and define to a new sip header file.
> 
> Reviewed-by: Peter Wang <peter.wang@mediatek.com>
> Signed-off-by: Peter Wang <peter.wang@mediatek.com>
> Signed-off-by: Po-Wen Kao <powen.kao@mediatek.com>
> ---
>  drivers/ufs/host/ufs-mediatek-sip.h | 90
> +++++++++++++++++++++++++++++
>  drivers/ufs/host/ufs-mediatek.c     |  3 +-
>  drivers/ufs/host/ufs-mediatek.h     | 79 -------------------------
>  3 files changed, 92 insertions(+), 80 deletions(-)
>  create mode 100755 drivers/ufs/host/ufs-mediatek-sip.h
> 
> diff --git a/drivers/ufs/host/ufs-mediatek-sip.h
> b/drivers/ufs/host/ufs-mediatek-sip.h
> new file mode 100755
> index 000000000000..30146bb1ccbe
> --- /dev/null
> +++ b/drivers/ufs/host/ufs-mediatek-sip.h
> @@ -0,0 +1,90 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2022 MediaTek Inc.
> + */
> +
> +#ifndef _UFS_MEDIATEK_SIP_H
> +#define _UFS_MEDIATEK_SIP_H
> +
> +#include <linux/soc/mediatek/mtk_sip_svc.h>
> +
> +/*
> + * SiP commands
> + */
> +#define MTK_SIP_UFS_CONTROL               MTK_SIP_SMC_CMD(0x276)
> +#define UFS_MTK_SIP_VA09_PWR_CTRL         BIT(0)
> +#define UFS_MTK_SIP_DEVICE_RESET          BIT(1)
> +#define UFS_MTK_SIP_CRYPTO_CTRL           BIT(2)
> +#define UFS_MTK_SIP_REF_CLK_NOTIFICATION  BIT(3)
> +#define UFS_MTK_SIP_HOST_PWR_CTRL         BIT(5)
> +#define UFS_MTK_SIP_GET_VCC_NUM           BIT(6)
> +#define UFS_MTK_SIP_DEVICE_PWR_CTRL       BIT(7)
> +
> +
> +/*
> + * Multi-VCC by Numbering
> + */
> +enum ufs_mtk_vcc_num {
> +	UFS_VCC_NONE = 0,
> +	UFS_VCC_1,
> +	UFS_VCC_2,
> +	UFS_VCC_MAX
> +};
> +
> +/*
> + * Host Power Control options
> + */
> +enum {
> +	HOST_PWR_HCI = 0,
> +	HOST_PWR_MPHY
> +};
> +
> +/*
> + * SMC call wrapper function
> + */
> +struct ufs_mtk_smc_arg {
> +	unsigned long cmd;
> +	struct arm_smccc_res *res;
> +	unsigned long v1;
> +	unsigned long v2;
> +	unsigned long v3;
> +	unsigned long v4;
> +	unsigned long v5;
> +	unsigned long v6;
> +	unsigned long v7;
> +};
> +
> +
> +static inline void _ufs_mtk_smc(struct ufs_mtk_smc_arg s)
> +{
> +	arm_smccc_smc(MTK_SIP_UFS_CONTROL,
> +		s.cmd,
> +		s.v1, s.v2, s.v3, s.v4, s.v5, s.v6, s.res);
> +}
> +
> +#define ufs_mtk_smc(...) \
> +	_ufs_mtk_smc((struct ufs_mtk_smc_arg) {__VA_ARGS__})
> +
> +/* Sip kernel interface */
> +#define ufs_mtk_va09_pwr_ctrl(res, on) \
> +	ufs_mtk_smc(UFS_MTK_SIP_VA09_PWR_CTRL, &(res), on)
> +
> +#define ufs_mtk_crypto_ctrl(res, enable) \
> +	ufs_mtk_smc(UFS_MTK_SIP_CRYPTO_CTRL, &(res), enable)
> +
> +#define ufs_mtk_ref_clk_notify(on, stage, res) \
> +	ufs_mtk_smc(UFS_MTK_SIP_REF_CLK_NOTIFICATION, &(res), on,
> stage)
> +
> +#define ufs_mtk_device_reset_ctrl(high, res) \
> +	ufs_mtk_smc(UFS_MTK_SIP_DEVICE_RESET, &(res), high)
> +
> +#define ufs_mtk_host_pwr_ctrl(opt, on, res) \
> +	ufs_mtk_smc(UFS_MTK_SIP_HOST_PWR_CTRL, &(res), opt, on)
> +
> +#define ufs_mtk_get_vcc_num(res) \
> +	ufs_mtk_smc(UFS_MTK_SIP_GET_VCC_NUM, &(res))
> +
> +#define ufs_mtk_device_pwr_ctrl(on, ufs_version, res) \
> +	ufs_mtk_smc(UFS_MTK_SIP_DEVICE_PWR_CTRL, &(res), on,
> ufs_version)
> +
> +#endif /* !_UFS_MEDIATEK_SIP_H */
> diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-
> mediatek.c
> index cdf29cfa490b..ae184e4f90e6 100644
> --- a/drivers/ufs/host/ufs-mediatek.c
> +++ b/drivers/ufs/host/ufs-mediatek.c
> @@ -20,13 +20,14 @@
>  #include <linux/pm_qos.h>
>  #include <linux/regulator/consumer.h>
>  #include <linux/reset.h>
> -#include <linux/soc/mediatek/mtk_sip_svc.h>
>  
>  #include <ufs/ufshcd.h>
>  #include "ufshcd-pltfrm.h"
>  #include <ufs/ufs_quirks.h>
>  #include <ufs/unipro.h>
> +
>  #include "ufs-mediatek.h"
> +#include "ufs-mediatek-sip.h"
>  
>  static int  ufs_mtk_config_mcq(struct ufs_hba *hba, bool irq);
>  
> diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-
> mediatek.h
> index 79c64de25254..17be3f748fa0 100644
> --- a/drivers/ufs/host/ufs-mediatek.h
> +++ b/drivers/ufs/host/ufs-mediatek.h
> @@ -8,7 +8,6 @@
>  
>  #include <linux/bitops.h>
>  #include <linux/pm_qos.h>
> -#include <linux/soc/mediatek/mtk_sip_svc.h>
>  
>  /*
>   * MCQ define and struct
> @@ -100,18 +99,6 @@ enum {
>  	VS_HIB_EXIT                 = 13,
>  };
>  
> -/*
> - * SiP commands
> - */
> -#define MTK_SIP_UFS_CONTROL               MTK_SIP_SMC_CMD(0x276)
> -#define UFS_MTK_SIP_VA09_PWR_CTRL         BIT(0)
> -#define UFS_MTK_SIP_DEVICE_RESET          BIT(1)
> -#define UFS_MTK_SIP_CRYPTO_CTRL           BIT(2)
> -#define UFS_MTK_SIP_REF_CLK_NOTIFICATION  BIT(3)
> -#define UFS_MTK_SIP_HOST_PWR_CTRL         BIT(5)
> -#define UFS_MTK_SIP_GET_VCC_NUM           BIT(6)
> -#define UFS_MTK_SIP_DEVICE_PWR_CTRL       BIT(7)
> -
>  /*
>   * VS_DEBUGCLOCKENABLE
>   */
> @@ -197,70 +184,4 @@ struct ufs_mtk_host {
>  	struct ufs_mtk_mcq_intr_info mcq_intr_info[UFSHCD_MAX_Q_NR];
>  };
>  
> -/*
> - * Multi-VCC by Numbering
> - */
> -enum ufs_mtk_vcc_num {
> -	UFS_VCC_NONE = 0,
> -	UFS_VCC_1,
> -	UFS_VCC_2,
> -	UFS_VCC_MAX
> -};
> -
> -/*
> - * Host Power Control options
> - */
> -enum {
> -	HOST_PWR_HCI = 0,
> -	HOST_PWR_MPHY
> -};
> -
> -/*
> - * SMC call wrapper function
> - */
> -struct ufs_mtk_smc_arg {
> -	unsigned long cmd;
> -	struct arm_smccc_res *res;
> -	unsigned long v1;
> -	unsigned long v2;
> -	unsigned long v3;
> -	unsigned long v4;
> -	unsigned long v5;
> -	unsigned long v6;
> -	unsigned long v7;
> -};
> -
> -static void _ufs_mtk_smc(struct ufs_mtk_smc_arg s)
> -{
> -	arm_smccc_smc(MTK_SIP_UFS_CONTROL,
> -		      s.cmd, s.v1, s.v2, s.v3, s.v4, s.v5, s.v6,
> s.res);
> -}
> -
> -#define ufs_mtk_smc(...) \
> -	_ufs_mtk_smc((struct ufs_mtk_smc_arg) {__VA_ARGS__})
> -
> -/*
> - * SMC call interface
> - */
> -#define ufs_mtk_va09_pwr_ctrl(res, on) \
> -	ufs_mtk_smc(UFS_MTK_SIP_VA09_PWR_CTRL, &(res), on)
> -
> -#define ufs_mtk_crypto_ctrl(res, enable) \
> -	ufs_mtk_smc(UFS_MTK_SIP_CRYPTO_CTRL, &(res), enable)
> -
> -#define ufs_mtk_ref_clk_notify(on, stage, res) \
> -	ufs_mtk_smc(UFS_MTK_SIP_REF_CLK_NOTIFICATION, &(res), on,
> stage)
> -
> -#define ufs_mtk_device_reset_ctrl(high, res) \
> -	ufs_mtk_smc(UFS_MTK_SIP_DEVICE_RESET, &(res), high)
> -
> -#define ufs_mtk_host_pwr_ctrl(opt, on, res) \
> -	ufs_mtk_smc(UFS_MTK_SIP_HOST_PWR_CTRL, &(res), opt, on)
> -
> -#define ufs_mtk_get_vcc_num(res) \
> -	ufs_mtk_smc(UFS_MTK_SIP_GET_VCC_NUM, &(res))
> -
> -#define ufs_mtk_device_pwr_ctrl(on, ufs_ver, res) \
> -	ufs_mtk_smc(UFS_MTK_SIP_DEVICE_PWR_CTRL, &(res), on, ufs_ver)
> -
>  #endif /* !_UFS_MEDIATEK_H */

Acked-by: Chun-Hung Wu <Chun-Hung.Wu@mediatek.com>
Peter Wang (王信友) March 15, 2024, 8:19 a.m. UTC | #3 
On Thu, 2024-03-14 at 19:36 -0700, Bart Van Assche wrote:
>  	 
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
>  On 3/7/24 23:02, peter.wang@mediatek.com wrote:
> > +/*
> > + * SiP commands
> > + */
> 
> An additional comment that explains what "SiP" means would be
> welcome.
> 
> Thanks,
> 
> Bart.
> 

Hi Bart,

It means Silcon Partner.
Will add comment next version.

Thanks.
Peter
diff mbox series

Patch

diff --git a/drivers/ufs/host/ufs-mediatek-sip.h b/drivers/ufs/host/ufs-mediatek-sip.h
new file mode 100755
index 000000000000..30146bb1ccbe
--- /dev/null
+++ b/drivers/ufs/host/ufs-mediatek-sip.h
@@ -0,0 +1,90 @@ 
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 MediaTek Inc.
+ */
+
+#ifndef _UFS_MEDIATEK_SIP_H
+#define _UFS_MEDIATEK_SIP_H
+
+#include <linux/soc/mediatek/mtk_sip_svc.h>
+
+/*
+ * SiP commands
+ */
+#define MTK_SIP_UFS_CONTROL               MTK_SIP_SMC_CMD(0x276)
+#define UFS_MTK_SIP_VA09_PWR_CTRL         BIT(0)
+#define UFS_MTK_SIP_DEVICE_RESET          BIT(1)
+#define UFS_MTK_SIP_CRYPTO_CTRL           BIT(2)
+#define UFS_MTK_SIP_REF_CLK_NOTIFICATION  BIT(3)
+#define UFS_MTK_SIP_HOST_PWR_CTRL         BIT(5)
+#define UFS_MTK_SIP_GET_VCC_NUM           BIT(6)
+#define UFS_MTK_SIP_DEVICE_PWR_CTRL       BIT(7)
+
+
+/*
+ * Multi-VCC by Numbering
+ */
+enum ufs_mtk_vcc_num {
+	UFS_VCC_NONE = 0,
+	UFS_VCC_1,
+	UFS_VCC_2,
+	UFS_VCC_MAX
+};
+
+/*
+ * Host Power Control options
+ */
+enum {
+	HOST_PWR_HCI = 0,
+	HOST_PWR_MPHY
+};
+
+/*
+ * SMC call wrapper function
+ */
+struct ufs_mtk_smc_arg {
+	unsigned long cmd;
+	struct arm_smccc_res *res;
+	unsigned long v1;
+	unsigned long v2;
+	unsigned long v3;
+	unsigned long v4;
+	unsigned long v5;
+	unsigned long v6;
+	unsigned long v7;
+};
+
+
+static inline void _ufs_mtk_smc(struct ufs_mtk_smc_arg s)
+{
+	arm_smccc_smc(MTK_SIP_UFS_CONTROL,
+		s.cmd,
+		s.v1, s.v2, s.v3, s.v4, s.v5, s.v6, s.res);
+}
+
+#define ufs_mtk_smc(...) \
+	_ufs_mtk_smc((struct ufs_mtk_smc_arg) {__VA_ARGS__})
+
+/* Sip kernel interface */
+#define ufs_mtk_va09_pwr_ctrl(res, on) \
+	ufs_mtk_smc(UFS_MTK_SIP_VA09_PWR_CTRL, &(res), on)
+
+#define ufs_mtk_crypto_ctrl(res, enable) \
+	ufs_mtk_smc(UFS_MTK_SIP_CRYPTO_CTRL, &(res), enable)
+
+#define ufs_mtk_ref_clk_notify(on, stage, res) \
+	ufs_mtk_smc(UFS_MTK_SIP_REF_CLK_NOTIFICATION, &(res), on, stage)
+
+#define ufs_mtk_device_reset_ctrl(high, res) \
+	ufs_mtk_smc(UFS_MTK_SIP_DEVICE_RESET, &(res), high)
+
+#define ufs_mtk_host_pwr_ctrl(opt, on, res) \
+	ufs_mtk_smc(UFS_MTK_SIP_HOST_PWR_CTRL, &(res), opt, on)
+
+#define ufs_mtk_get_vcc_num(res) \
+	ufs_mtk_smc(UFS_MTK_SIP_GET_VCC_NUM, &(res))
+
+#define ufs_mtk_device_pwr_ctrl(on, ufs_version, res) \
+	ufs_mtk_smc(UFS_MTK_SIP_DEVICE_PWR_CTRL, &(res), on, ufs_version)
+
+#endif /* !_UFS_MEDIATEK_SIP_H */
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index cdf29cfa490b..ae184e4f90e6 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -20,13 +20,14 @@ 
 #include <linux/pm_qos.h>
 #include <linux/regulator/consumer.h>
 #include <linux/reset.h>
-#include <linux/soc/mediatek/mtk_sip_svc.h>
 
 #include <ufs/ufshcd.h>
 #include "ufshcd-pltfrm.h"
 #include <ufs/ufs_quirks.h>
 #include <ufs/unipro.h>
+
 #include "ufs-mediatek.h"
+#include "ufs-mediatek-sip.h"
 
 static int  ufs_mtk_config_mcq(struct ufs_hba *hba, bool irq);
 
diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h
index 79c64de25254..17be3f748fa0 100644
--- a/drivers/ufs/host/ufs-mediatek.h
+++ b/drivers/ufs/host/ufs-mediatek.h
@@ -8,7 +8,6 @@ 
 
 #include <linux/bitops.h>
 #include <linux/pm_qos.h>
-#include <linux/soc/mediatek/mtk_sip_svc.h>
 
 /*
  * MCQ define and struct
@@ -100,18 +99,6 @@  enum {
 	VS_HIB_EXIT                 = 13,
 };
 
-/*
- * SiP commands
- */
-#define MTK_SIP_UFS_CONTROL               MTK_SIP_SMC_CMD(0x276)
-#define UFS_MTK_SIP_VA09_PWR_CTRL         BIT(0)
-#define UFS_MTK_SIP_DEVICE_RESET          BIT(1)
-#define UFS_MTK_SIP_CRYPTO_CTRL           BIT(2)
-#define UFS_MTK_SIP_REF_CLK_NOTIFICATION  BIT(3)
-#define UFS_MTK_SIP_HOST_PWR_CTRL         BIT(5)
-#define UFS_MTK_SIP_GET_VCC_NUM           BIT(6)
-#define UFS_MTK_SIP_DEVICE_PWR_CTRL       BIT(7)
-
 /*
  * VS_DEBUGCLOCKENABLE
  */
@@ -197,70 +184,4 @@  struct ufs_mtk_host {
 	struct ufs_mtk_mcq_intr_info mcq_intr_info[UFSHCD_MAX_Q_NR];
 };
 
-/*
- * Multi-VCC by Numbering
- */
-enum ufs_mtk_vcc_num {
-	UFS_VCC_NONE = 0,
-	UFS_VCC_1,
-	UFS_VCC_2,
-	UFS_VCC_MAX
-};
-
-/*
- * Host Power Control options
- */
-enum {
-	HOST_PWR_HCI = 0,
-	HOST_PWR_MPHY
-};
-
-/*
- * SMC call wrapper function
- */
-struct ufs_mtk_smc_arg {
-	unsigned long cmd;
-	struct arm_smccc_res *res;
-	unsigned long v1;
-	unsigned long v2;
-	unsigned long v3;
-	unsigned long v4;
-	unsigned long v5;
-	unsigned long v6;
-	unsigned long v7;
-};
-
-static void _ufs_mtk_smc(struct ufs_mtk_smc_arg s)
-{
-	arm_smccc_smc(MTK_SIP_UFS_CONTROL,
-		      s.cmd, s.v1, s.v2, s.v3, s.v4, s.v5, s.v6, s.res);
-}
-
-#define ufs_mtk_smc(...) \
-	_ufs_mtk_smc((struct ufs_mtk_smc_arg) {__VA_ARGS__})
-
-/*
- * SMC call interface
- */
-#define ufs_mtk_va09_pwr_ctrl(res, on) \
-	ufs_mtk_smc(UFS_MTK_SIP_VA09_PWR_CTRL, &(res), on)
-
-#define ufs_mtk_crypto_ctrl(res, enable) \
-	ufs_mtk_smc(UFS_MTK_SIP_CRYPTO_CTRL, &(res), enable)
-
-#define ufs_mtk_ref_clk_notify(on, stage, res) \
-	ufs_mtk_smc(UFS_MTK_SIP_REF_CLK_NOTIFICATION, &(res), on, stage)
-
-#define ufs_mtk_device_reset_ctrl(high, res) \
-	ufs_mtk_smc(UFS_MTK_SIP_DEVICE_RESET, &(res), high)
-
-#define ufs_mtk_host_pwr_ctrl(opt, on, res) \
-	ufs_mtk_smc(UFS_MTK_SIP_HOST_PWR_CTRL, &(res), opt, on)
-
-#define ufs_mtk_get_vcc_num(res) \
-	ufs_mtk_smc(UFS_MTK_SIP_GET_VCC_NUM, &(res))
-
-#define ufs_mtk_device_pwr_ctrl(on, ufs_ver, res) \
-	ufs_mtk_smc(UFS_MTK_SIP_DEVICE_PWR_CTRL, &(res), on, ufs_ver)
-
 #endif /* !_UFS_MEDIATEK_H */