| Message ID | 20240308070241.9163-6-peter.wang@mediatek.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | ufs: host: mediatek: Provide features and fixes in MediaTek platforms | expand |
> From: Peter Wang <peter.wang@mediatek.com> > > From: Po-Wen Kao <powen.kao@mediatek.com> > > Host power control is control crypto sram power. > Rename it for easy maintain. > > Reviewed-by: Peter Wang <peter.wang@mediatek.com> > Signed-off-by: Peter Wang <peter.wang@mediatek.com> > Signed-off-by: Po-Wen Kao <powen.kao@mediatek.com> Reviewed-by: Avri Altman <avri.altman@wdc.com> > --- > drivers/ufs/host/ufs-mediatek-sip.h | 13 +++---------- > drivers/ufs/host/ufs-mediatek.c | 4 ++-- > 2 files changed, 5 insertions(+), 12 deletions(-) > > diff --git a/drivers/ufs/host/ufs-mediatek-sip.h b/drivers/ufs/host/ufs-mediatek- > sip.h > index 30146bb1ccbe..fd640846910a 100755 > --- a/drivers/ufs/host/ufs-mediatek-sip.h > +++ b/drivers/ufs/host/ufs-mediatek-sip.h > @@ -16,7 +16,7 @@ > #define UFS_MTK_SIP_DEVICE_RESET BIT(1) > #define UFS_MTK_SIP_CRYPTO_CTRL BIT(2) > #define UFS_MTK_SIP_REF_CLK_NOTIFICATION BIT(3) > -#define UFS_MTK_SIP_HOST_PWR_CTRL BIT(5) > +#define UFS_MTK_SIP_SRAM_PWR_CTRL BIT(5) > #define UFS_MTK_SIP_GET_VCC_NUM BIT(6) > #define UFS_MTK_SIP_DEVICE_PWR_CTRL BIT(7) > > @@ -31,13 +31,6 @@ enum ufs_mtk_vcc_num { > UFS_VCC_MAX > }; > > -/* > - * Host Power Control options > - */ > -enum { > - HOST_PWR_HCI = 0, > - HOST_PWR_MPHY > -}; > > /* > * SMC call wrapper function > @@ -78,8 +71,8 @@ static inline void _ufs_mtk_smc(struct ufs_mtk_smc_arg > s) #define ufs_mtk_device_reset_ctrl(high, res) \ > ufs_mtk_smc(UFS_MTK_SIP_DEVICE_RESET, &(res), high) > > -#define ufs_mtk_host_pwr_ctrl(opt, on, res) \ > - ufs_mtk_smc(UFS_MTK_SIP_HOST_PWR_CTRL, &(res), opt, on) > +#define ufs_mtk_sram_pwr_ctrl(on, res) \ > + ufs_mtk_smc(UFS_MTK_SIP_SRAM_PWR_CTRL, &(res), on) > > #define ufs_mtk_get_vcc_num(res) \ > ufs_mtk_smc(UFS_MTK_SIP_GET_VCC_NUM, &(res)) diff --git > a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c index > ae184e4f90e6..2caf0c1d4e17 100644 > --- a/drivers/ufs/host/ufs-mediatek.c > +++ b/drivers/ufs/host/ufs-mediatek.c > @@ -1376,7 +1376,7 @@ static int ufs_mtk_suspend(struct ufs_hba *hba, > enum ufs_pm_op pm_op, > if (ufshcd_is_link_off(hba)) > ufs_mtk_device_reset_ctrl(0, res); > > - ufs_mtk_host_pwr_ctrl(HOST_PWR_HCI, false, res); > + ufs_mtk_sram_pwr_ctrl(false, res); > > return 0; > fail: > @@ -1397,7 +1397,7 @@ static int ufs_mtk_resume(struct ufs_hba *hba, enum > ufs_pm_op pm_op) > if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) > ufs_mtk_dev_vreg_set_lpm(hba, false); > > - ufs_mtk_host_pwr_ctrl(HOST_PWR_HCI, true, res); > + ufs_mtk_sram_pwr_ctrl(true, res); > > err = ufs_mtk_mphy_power_on(hba, true); > if (err) > -- > 2.18.0
On Fri, 2024-03-08 at 15:02 +0800, peter.wang@mediatek.com wrote: > From: Peter Wang <peter.wang@mediatek.com> > > From: Po-Wen Kao <powen.kao@mediatek.com> > > Host power control is control crypto sram power. > Rename it for easy maintain. > > Reviewed-by: Peter Wang <peter.wang@mediatek.com> > Signed-off-by: Peter Wang <peter.wang@mediatek.com> > Signed-off-by: Po-Wen Kao <powen.kao@mediatek.com> > --- > drivers/ufs/host/ufs-mediatek-sip.h | 13 +++---------- > drivers/ufs/host/ufs-mediatek.c | 4 ++-- > 2 files changed, 5 insertions(+), 12 deletions(-) > > diff --git a/drivers/ufs/host/ufs-mediatek-sip.h > b/drivers/ufs/host/ufs-mediatek-sip.h > index 30146bb1ccbe..fd640846910a 100755 > --- a/drivers/ufs/host/ufs-mediatek-sip.h > +++ b/drivers/ufs/host/ufs-mediatek-sip.h > @@ -16,7 +16,7 @@ > #define UFS_MTK_SIP_DEVICE_RESET BIT(1) > #define UFS_MTK_SIP_CRYPTO_CTRL BIT(2) > #define UFS_MTK_SIP_REF_CLK_NOTIFICATION BIT(3) > -#define UFS_MTK_SIP_HOST_PWR_CTRL BIT(5) > +#define UFS_MTK_SIP_SRAM_PWR_CTRL BIT(5) > #define UFS_MTK_SIP_GET_VCC_NUM BIT(6) > #define UFS_MTK_SIP_DEVICE_PWR_CTRL BIT(7) > > @@ -31,13 +31,6 @@ enum ufs_mtk_vcc_num { > UFS_VCC_MAX > }; > > -/* > - * Host Power Control options > - */ > -enum { > - HOST_PWR_HCI = 0, > - HOST_PWR_MPHY > -}; > > /* > * SMC call wrapper function > @@ -78,8 +71,8 @@ static inline void _ufs_mtk_smc(struct > ufs_mtk_smc_arg s) > #define ufs_mtk_device_reset_ctrl(high, res) \ > ufs_mtk_smc(UFS_MTK_SIP_DEVICE_RESET, &(res), high) > > -#define ufs_mtk_host_pwr_ctrl(opt, on, res) \ > - ufs_mtk_smc(UFS_MTK_SIP_HOST_PWR_CTRL, &(res), opt, on) > +#define ufs_mtk_sram_pwr_ctrl(on, res) \ > + ufs_mtk_smc(UFS_MTK_SIP_SRAM_PWR_CTRL, &(res), on) > > #define ufs_mtk_get_vcc_num(res) \ > ufs_mtk_smc(UFS_MTK_SIP_GET_VCC_NUM, &(res)) > diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs- > mediatek.c > index ae184e4f90e6..2caf0c1d4e17 100644 > --- a/drivers/ufs/host/ufs-mediatek.c > +++ b/drivers/ufs/host/ufs-mediatek.c > @@ -1376,7 +1376,7 @@ static int ufs_mtk_suspend(struct ufs_hba *hba, > enum ufs_pm_op pm_op, > if (ufshcd_is_link_off(hba)) > ufs_mtk_device_reset_ctrl(0, res); > > - ufs_mtk_host_pwr_ctrl(HOST_PWR_HCI, false, res); > + ufs_mtk_sram_pwr_ctrl(false, res); > > return 0; > fail: > @@ -1397,7 +1397,7 @@ static int ufs_mtk_resume(struct ufs_hba *hba, > enum ufs_pm_op pm_op) > if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) > ufs_mtk_dev_vreg_set_lpm(hba, false); > > - ufs_mtk_host_pwr_ctrl(HOST_PWR_HCI, true, res); > + ufs_mtk_sram_pwr_ctrl(true, res); > > err = ufs_mtk_mphy_power_on(hba, true); > if (err) Acked-by: Chun-Hung Wu <Chun-Hung.Wu@mediatek.com>
On 3/7/24 23:02, peter.wang@mediatek.com wrote:
> Host power control is control crypto sram power.
The above sentence is incomprehensible to me.
Thanks,
Bart.
On Thu, 2024-03-14 at 19:40 -0700, Bart Van Assche wrote: > > External email : Please do not click links or open attachments until > you have verified the sender or the content. > On 3/7/24 23:02, peter.wang@mediatek.com wrote: > > Host power control is control crypto sram power. > > The above sentence is incomprehensible to me. > > Thanks, > > Bart. Hi Bart, It is medaitek host design. Will add more description next version. Thanks. Peter
diff --git a/drivers/ufs/host/ufs-mediatek-sip.h b/drivers/ufs/host/ufs-mediatek-sip.h index 30146bb1ccbe..fd640846910a 100755 --- a/drivers/ufs/host/ufs-mediatek-sip.h +++ b/drivers/ufs/host/ufs-mediatek-sip.h @@ -16,7 +16,7 @@ #define UFS_MTK_SIP_DEVICE_RESET BIT(1) #define UFS_MTK_SIP_CRYPTO_CTRL BIT(2) #define UFS_MTK_SIP_REF_CLK_NOTIFICATION BIT(3) -#define UFS_MTK_SIP_HOST_PWR_CTRL BIT(5) +#define UFS_MTK_SIP_SRAM_PWR_CTRL BIT(5) #define UFS_MTK_SIP_GET_VCC_NUM BIT(6) #define UFS_MTK_SIP_DEVICE_PWR_CTRL BIT(7) @@ -31,13 +31,6 @@ enum ufs_mtk_vcc_num { UFS_VCC_MAX }; -/* - * Host Power Control options - */ -enum { - HOST_PWR_HCI = 0, - HOST_PWR_MPHY -}; /* * SMC call wrapper function @@ -78,8 +71,8 @@ static inline void _ufs_mtk_smc(struct ufs_mtk_smc_arg s) #define ufs_mtk_device_reset_ctrl(high, res) \ ufs_mtk_smc(UFS_MTK_SIP_DEVICE_RESET, &(res), high) -#define ufs_mtk_host_pwr_ctrl(opt, on, res) \ - ufs_mtk_smc(UFS_MTK_SIP_HOST_PWR_CTRL, &(res), opt, on) +#define ufs_mtk_sram_pwr_ctrl(on, res) \ + ufs_mtk_smc(UFS_MTK_SIP_SRAM_PWR_CTRL, &(res), on) #define ufs_mtk_get_vcc_num(res) \ ufs_mtk_smc(UFS_MTK_SIP_GET_VCC_NUM, &(res)) diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c index ae184e4f90e6..2caf0c1d4e17 100644 --- a/drivers/ufs/host/ufs-mediatek.c +++ b/drivers/ufs/host/ufs-mediatek.c @@ -1376,7 +1376,7 @@ static int ufs_mtk_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op, if (ufshcd_is_link_off(hba)) ufs_mtk_device_reset_ctrl(0, res); - ufs_mtk_host_pwr_ctrl(HOST_PWR_HCI, false, res); + ufs_mtk_sram_pwr_ctrl(false, res); return 0; fail: @@ -1397,7 +1397,7 @@ static int ufs_mtk_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op) if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) ufs_mtk_dev_vreg_set_lpm(hba, false); - ufs_mtk_host_pwr_ctrl(HOST_PWR_HCI, true, res); + ufs_mtk_sram_pwr_ctrl(true, res); err = ufs_mtk_mphy_power_on(hba, true); if (err)