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J . Bottomley" , "Martin K . Petersen" Cc: Alim Akhtar , Avri Altman , Bart Van Assche , Minwoo Im , gost.dev@samsung.com, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, Jeuk Kim Subject: [PATCH 1/3] ufs: mcq: Add ufshcd_mcq_queue_cfg_addr helper Date: Fri, 31 May 2024 19:38:19 +0900 Message-Id: <20240531103821.1583934-2-minwoo.im@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240531103821.1583934-1-minwoo.im@samsung.com> Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprLJsWRmVeSWpSXmKPExsWy7bCmma7P6sg0g3cz+CwezNvGZvHy51U2 i2kffjJb3Dywk8liYz+Hxf2t1xgtLu+aw2bRfX0Hm8Xy4/+YLJ6dPsDswOVx+Yq3x7RJp9g8 Pj69xeLRt2UVo8fnTXIe7Qe6mQLYorJtMlITU1KLFFLzkvNTMvPSbZW8g+Od403NDAx1DS0t zJUU8hJzU22VXHwCdN0yc4AOU1IoS8wpBQoFJBYXK+nb2RTll5akKmTkF5fYKqUWpOQUmBfo FSfmFpfmpevlpZZYGRoYGJkCFSZkZ0z8PYu14Ax/Rdes1YwNjDN4uxg5OSQETCSmfbnG2MXI xSEksINRonnDZSjnE6PEoq//mUCqhAS+MUr8/B4J07F2x3IWiKK9jBK/bu9hhnB+M0p09K5m BqliE1CXaJj6igXEFhGoltjc/pcNpIhZoI9Jon32fFaQhLCAs8Slm08ZQWwWAVWJ/nUfwJp5 BWwk2h69ZYNYJy+x/+BZsDingK1Ey/+TbBA1ghInZz4BW8AMVNO8dTbYFRICjRwSlz7cgGp2 kTj4cSozhC0s8er4FnYIW0riZX8blF0u8fPNJEYIu0Li4KzbQL0cQLa9xLXnKSAms4CmxPpd +hBRZYkjt6C28kl0HP7LDhHmlehoE4KYoSzx8dAhqJ2SEssvvYa6xUPi4Zsv0HCbwChx/NpJ pgmMCrOQPDMLyTOzEBYvYGRexSiWWlCcm55abFRgAo/g5PzcTYzgdKrlsYNx9tsPeocYmTgY DzFKcDArifD+So9IE+JNSaysSi3Kjy8qzUktPsRoCgzqicxSosn5wISeVxJvaGJpYGJmZmhu ZGpgriTOe691boqQQHpiSWp2ampBahFMHxMHp1QDU/eRKa2H2tQDBD82sW/XENjTbv+G48nZ 6qiykl9NzDZsq3/5vXNgTNiqYCvsPH92qvuE6BOsF0TPe21Lemr59vGH8sYlzIUbfKR3B0jw HA9IWs244+RZplxNWzY+lxP81rI8G2uT3vjMnBLydNm1e7FM0Zy95ab/cl9v37jbe+bxT/vD 3Y9J7Qr5OIVxxq4vrK4HjATZP3q0Oekqbv81c9Uz68aDRy1b/3K9TKiSvu042eNuxvK4rtT5 qTelHr7f/eHfFJeqLd+t/l2Y8el+5nLTt+v3ZZ6ztH5SKB21yL04dsHC0z9W/p4795ZCwJ1A p94HPrGCuy5yLwif2PRb0HZPcdKJsDTesuqbcQGa1kosxRmJhlrMRcWJAFmCxtcwBAAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrFLMWRmVeSWpSXmKPExsWy7bCSnK736sg0g6ULzCwezNvGZvHy51U2 i2kffjJb3Dywk8liYz+Hxf2t1xgtLu+aw2bRfX0Hm8Xy4/+YLJ6dPsDswOVx+Yq3x7RJp9g8 Pj69xeLRt2UVo8fnTXIe7Qe6mQLYorhsUlJzMstSi/TtErgyJv6exVpwhr+ia9ZqxgbGGbxd jJwcEgImEmt3LGfpYuTiEBLYzSjxfcY0doiEpMS+0zdZIWxhifstR1ghin4ySrz/foMRJMEm oC7RMPUVC4gtIlAtsbn9LxtIEbPANCaJRbMguoUFnCUu3XwK1sAioCrRv+4DM4jNK2Aj0fbo LRvEBnmJ/QfPgsU5BWwlWv6fBIsLAdWsvvySBaJeUOLkzCdgNjNQffPW2cwTGAVmIUnNQpJa wMi0ilEytaA4Nz032bDAMC+1XK84Mbe4NC9dLzk/dxMjOPi1NHYw3pv/T+8QIxMH4yFGCQ5m JRHeX+kRaUK8KYmVValF+fFFpTmpxYcYpTlYlMR5DWfMThESSE8sSc1OTS1ILYLJMnFwSjUw Naee/SF9/eeu2wI2d7/sOaGz6o78XIFVMotudBt5fY4xP7zmf3JbxLaHa5j8NYzq58/a0erT cnBnhFHIA2srpR+3k2JenZE75Ncqkbtjp3Lwh12r+h9tPDGnV2CzwpS6Fp77Sg4VURPvrg5T e/VsTTIH+5/00iT3Gb/sWjcL3t5/Qd31UquvZX31mdKosO/LZ29JFbnAz2B67uGcCcXrTKcs SzlfOkve+H+upPn7EpY6je0/7ZVunJBO/jPxxhGnAy80VU/O0kvQbflar8SS17ygWGp+Wcul u3p3Ne4/i3Y/9qB/neU+vQdhMkd83fJcV+m+01b+smma1PWL1suNZW5qRYQvmMwxbW5w6/Z+ BSWW4oxEQy3mouJEAIu0SmjtAgAA X-CMS-MailID: 20240531104947epcas2p1cd477921c1cd307d84f9ffc25b2c08a8 X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20240531104947epcas2p1cd477921c1cd307d84f9ffc25b2c08a8 References: <20240531103821.1583934-1-minwoo.im@samsung.com> This helper returns an offset address of MCQ queue configuration registers. This is a prep patch for the following patch. Signed-off-by: Minwoo Im --- drivers/ufs/core/ufs-mcq.c | 14 ++++++++++++++ include/ufs/ufshcd.h | 1 + 2 files changed, 15 insertions(+) diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c index 52210c4c20dc..46faa54aea94 100644 --- a/drivers/ufs/core/ufs-mcq.c +++ b/drivers/ufs/core/ufs-mcq.c @@ -18,6 +18,7 @@ #include #define MAX_QUEUE_SUP GENMASK(7, 0) +#define QCFGPTR GENMASK(23, 16) #define UFS_MCQ_MIN_RW_QUEUES 2 #define UFS_MCQ_MIN_READ_QUEUES 0 #define UFS_MCQ_MIN_POLL_QUEUES 0 @@ -116,6 +117,19 @@ struct ufs_hw_queue *ufshcd_mcq_req_to_hwq(struct ufs_hba *hba, return &hba->uhq[hwq]; } +/** + * ufshcd_mcq_queue_cfg_addr - get an start address of the MCQ Queue Config + * Registers. + * @hba: per adapter instance + * + * Return: Start address of MCQ Queue Config Registers in HCI + */ +unsigned int ufshcd_mcq_queue_cfg_addr(struct ufs_hba *hba) +{ + return FIELD_GET(QCFGPTR, hba->mcq_capabilities) * 0x200; +} +EXPORT_SYMBOL_GPL(ufshcd_mcq_queue_cfg_addr); + /** * ufshcd_mcq_decide_queue_depth - decide the queue depth * @hba: per adapter instance diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index df68fb1d4f3f..9e0581115b34 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -1278,6 +1278,7 @@ void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val); void ufshcd_hba_stop(struct ufs_hba *hba); void ufshcd_schedule_eh_work(struct ufs_hba *hba); void ufshcd_mcq_config_mac(struct ufs_hba *hba, u32 max_active_cmds); +unsigned int ufshcd_mcq_queue_cfg_addr(struct ufs_hba *hba); u32 ufshcd_mcq_read_cqis(struct ufs_hba *hba, int i); void ufshcd_mcq_write_cqis(struct ufs_hba *hba, u32 val, int i); unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba,