From patchwork Wed Jul 3 03:57:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 13721336 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 700AB13A402; Wed, 3 Jul 2024 04:05:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719979550; cv=none; b=uH4AfPmql8nnYMwiBPJjJRnSBlyg8K5qZ8n/1T0zjA6M9Sijg5Lo5yaRTYRYpfzLSKOATp8qUhP3u4oiT8lkxBkXHYTWjYqKF5xtWxrSzCfZY206tbucpMvPt6o7fFJducA0XZeNLKtk3zEUUXMRulSMkMC3075cilp3y70neM0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719979550; c=relaxed/simple; bh=v+A/DtVpf4GJe7SCQiXk2KCmsGnf1P5ifpw4rjwb6nY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=N09K7VBhPHwrfc2dd4rnUxdujjKZ+Hhs6vXYlb8lU0xcQw38xEswoR3R1Pt1g9iBdCg0q+w3njJLALx1t9igRqMnQWLSFDM83xmdhcmzM/i102aRKhbUyKma4MgciYFOqBztkt6NaDSILIjv9AETszqKU4fDz7qhbz4GqPRo3ZQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=QAETEJps; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="QAETEJps" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 462HE10i026062; Wed, 3 Jul 2024 04:03:55 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= GY/GHLAFr5sCIFCCIoy38lmEZgHtkIc83blcqsG8imY=; b=QAETEJpstcxAIso/ asZYRAK9L/foNazqQM2ZaqyYo2A1CMBytGxWB/fblCAXyPHH6XCmULVmi7Mp3Xa/ 8/mR2rJp9NexM56XN4646kIxCEI3v0lvw6MyIt75FlN5tqgwu+acdWdRWIHXTQBI mKaA3Eu5s1g+YQQvsU6LHuRw53STjILJK5cB6VR1LURPu19IqS8PwOHwjRVEmzgx L6Zo66aAkw3W0RiKlKn61RgpG12zX2yICUGYIO3Yg+XDL6pR0i0ghZ58cJgDyYxB 0MbcLe0/3BoPoW5BA08u8u1CG1k5p9L1SjWh3wtkEh22LI7laAdVlYtOfgEGBukY VW8Rtg== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4027mnqxgu-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 03 Jul 2024 04:03:55 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 46343sCR024743 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 Jul 2024 04:03:54 GMT Received: from tengfan-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 2 Jul 2024 21:03:32 -0700 From: Tengfei Fan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Tengfei Fan Subject: [PATCH 16/47] dt-bindings: clock: qcom: describe the GPUCC clock for QCS9100 Date: Wed, 3 Jul 2024 11:57:04 +0800 Message-ID: <20240703035735.2182165-17-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240703035735.2182165-1-quic_tengfan@quicinc.com> References: <20240703025850.2172008-1-quic_tengfan@quicinc.com> <20240703035735.2182165-1-quic_tengfan@quicinc.com> Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: gVaSlQF27Ac54gf7JYrvuIAfMpdTfSce X-Proofpoint-GUID: gVaSlQF27Ac54gf7JYrvuIAfMpdTfSce X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-02_18,2024-07-02_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 bulkscore=0 spamscore=0 malwarescore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 phishscore=0 mlxscore=0 suspectscore=0 clxscore=1015 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407030027 Add the compatible for the Qualcomm Graphics Clock control module present on QCS9100 platforms. It matches the generic QCom GPUCC description. Add device-specific DT bindings defines as well. Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/clock/qcom,gpucc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml index 0858fd635282..33eb62ec4745 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml @@ -27,6 +27,7 @@ description: | properties: compatible: enum: + - qcom,qcs9100-gpucc - qcom,sdm845-gpucc - qcom,sa8775p-gpucc - qcom,sc7180-gpucc