| Message ID | 20240904-qcs8300_initial_dtsi-v1-17-d0ea9afdc007@quicinc.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Add initial support for QCS8300 | expand |
On 04/09/2024 10:33, Jingyi Wang wrote: > Enable clock controller, interrconnect and pinctrl for QCS8300. NXP QCS8300? What is QCS8300? Which products use it? That's a defconfig for entire kernel, not your Qualcomm one. > It needs to be built-in for UART to provide a console. > > Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com> > --- > arch/arm64/configs/defconfig | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig > index 81ca46e3ab4b..a9ba6b25a0ed 100644 > --- a/arch/arm64/configs/defconfig > +++ b/arch/arm64/configs/defconfig > @@ -606,6 +606,7 @@ CONFIG_PINCTRL_MSM8996=y > CONFIG_PINCTRL_MSM8998=y > CONFIG_PINCTRL_QCM2290=y > CONFIG_PINCTRL_QCS404=y > +CONFIG_PINCTRL_QCS8300=y > CONFIG_PINCTRL_QDF2XXX=y > CONFIG_PINCTRL_QDU1000=y > CONFIG_PINCTRL_SA8775P=y > @@ -1317,6 +1318,7 @@ CONFIG_MSM_MMCC_8998=m > CONFIG_QCM_GCC_2290=y > CONFIG_QCM_DISPCC_2290=m > CONFIG_QCS_GCC_404=y > +CONFIG_QCS_GCC_8300=y > CONFIG_QDU_GCC_1000=y > CONFIG_SC_CAMCC_8280XP=m > CONFIG_SC_DISPCC_7280=m > @@ -1618,6 +1620,7 @@ CONFIG_INTERCONNECT_QCOM_MSM8996=y > CONFIG_INTERCONNECT_QCOM_OSM_L3=m > CONFIG_INTERCONNECT_QCOM_QCM2290=y > CONFIG_INTERCONNECT_QCOM_QCS404=m > +CONFIG_INTERCONNECT_QCOM_QCS8300=y Why this cannot be a module? Best regards, Krzysztof
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 81ca46e3ab4b..a9ba6b25a0ed 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -606,6 +606,7 @@ CONFIG_PINCTRL_MSM8996=y CONFIG_PINCTRL_MSM8998=y CONFIG_PINCTRL_QCM2290=y CONFIG_PINCTRL_QCS404=y +CONFIG_PINCTRL_QCS8300=y CONFIG_PINCTRL_QDF2XXX=y CONFIG_PINCTRL_QDU1000=y CONFIG_PINCTRL_SA8775P=y @@ -1317,6 +1318,7 @@ CONFIG_MSM_MMCC_8998=m CONFIG_QCM_GCC_2290=y CONFIG_QCM_DISPCC_2290=m CONFIG_QCS_GCC_404=y +CONFIG_QCS_GCC_8300=y CONFIG_QDU_GCC_1000=y CONFIG_SC_CAMCC_8280XP=m CONFIG_SC_DISPCC_7280=m @@ -1618,6 +1620,7 @@ CONFIG_INTERCONNECT_QCOM_MSM8996=y CONFIG_INTERCONNECT_QCOM_OSM_L3=m CONFIG_INTERCONNECT_QCOM_QCM2290=y CONFIG_INTERCONNECT_QCOM_QCS404=m +CONFIG_INTERCONNECT_QCOM_QCS8300=y CONFIG_INTERCONNECT_QCOM_QDU1000=y CONFIG_INTERCONNECT_QCOM_SA8775P=y CONFIG_INTERCONNECT_QCOM_SC7180=y
Enable clock controller, interrconnect and pinctrl for QCS8300. It needs to be built-in for UART to provide a console. Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com> --- arch/arm64/configs/defconfig | 3 +++ 1 file changed, 3 insertions(+)