From patchwork Wed Jun 21 14:29:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roberto Sassu X-Patchwork-Id: 9802019 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1D5AA6038C for ; Wed, 21 Jun 2017 14:34:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0E1EE285C9 for ; Wed, 21 Jun 2017 14:34:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 023FB285CF; Wed, 21 Jun 2017 14:34:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9BFD5285C9 for ; Wed, 21 Jun 2017 14:34:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752638AbdFUOeB (ORCPT ); Wed, 21 Jun 2017 10:34:01 -0400 Received: from lhrrgout.huawei.com ([194.213.3.17]:29085 "EHLO lhrrgout.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751927AbdFUOd7 (ORCPT ); Wed, 21 Jun 2017 10:33:59 -0400 Received: from 172.18.7.190 (EHLO LHREML711-CAH.china.huawei.com) ([172.18.7.190]) by lhrrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DPO49357; Wed, 21 Jun 2017 14:33:57 +0000 (GMT) Received: from roberto-HP-EliteDesk-800-G2-DM-65W.huawei.com (10.204.65.245) by smtpsuk.huawei.com (10.201.108.34) with Microsoft SMTP Server (TLS) id 14.3.301.0; Wed, 21 Jun 2017 15:33:29 +0100 From: Roberto Sassu To: CC: , , , , Roberto Sassu Subject: [PATCH v3 3/6] tpm: introduce tpm_pcr_bank_info structure with digest_size from TPM Date: Wed, 21 Jun 2017 16:29:38 +0200 Message-ID: <20170621142941.32674-4-roberto.sassu@huawei.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170621142941.32674-1-roberto.sassu@huawei.com> References: <20170621142941.32674-1-roberto.sassu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.204.65.245] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090206.594A83D5.0128, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: fb80c7dd079e7fd430e26cc4f3448586 Sender: owner-linux-security-module@vger.kernel.org Precedence: bulk List-ID: X-Virus-Scanned: ClamAV using ClamSMTP This patch introduces the new structure tpm_pcr_bank_info to store information regarding PCR banks. The next patch will replace the array of TPM algorithms IDs with an array of the new structure. tpm_pcr_bank_info contains the TPM algorithm ID, the digest size and, optionally, the corresponding crypto ID, if a mapping exists. These information will be used by IMA to calculate the digest of an event and to provide measurements logs to userspace applications. The new structure has been defined in include/linux/tpm.h, as it will be passed to functions outside the TPM driver. The purpose of this patch is to fix a serious issue in tpm2_pcr_extend(): if the mapping between a TPM algorithm and a crypto algorithm is not defined, the PCR bank with the unknown algorithm is not extended. This gives the opportunity to an attacker to reply to remote attestation requests with a list of fake measurements. Instead, the digest size is retrieved from the output buffer of a PCR read, without relying on the crypto subsystem. Signed-off-by: Roberto Sassu --- drivers/char/tpm/tpm.h | 11 ----------- drivers/char/tpm/tpm2-cmd.c | 30 ++++++++++++++++++++++++++++++ include/linux/tpm.h | 19 +++++++++++++++++++ 3 files changed, 49 insertions(+), 11 deletions(-) diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h index 1df0521..62c600d 100644 --- a/drivers/char/tpm/tpm.h +++ b/drivers/char/tpm/tpm.h @@ -98,17 +98,6 @@ enum tpm2_return_codes { TPM2_RC_REFERENCE_H0 = 0x0910, }; -enum tpm2_algorithms { - TPM2_ALG_ERROR = 0x0000, - TPM2_ALG_SHA1 = 0x0004, - TPM2_ALG_KEYEDHASH = 0x0008, - TPM2_ALG_SHA256 = 0x000B, - TPM2_ALG_SHA384 = 0x000C, - TPM2_ALG_SHA512 = 0x000D, - TPM2_ALG_NULL = 0x0010, - TPM2_ALG_SM3_256 = 0x0012, -}; - enum tpm2_command_codes { TPM2_CC_FIRST = 0x011F, TPM2_CC_SELF_TEST = 0x0143, diff --git a/drivers/char/tpm/tpm2-cmd.c b/drivers/char/tpm/tpm2-cmd.c index 6a9fe0d..74a68ea 100644 --- a/drivers/char/tpm/tpm2-cmd.c +++ b/drivers/char/tpm/tpm2-cmd.c @@ -992,6 +992,36 @@ int tpm2_probe(struct tpm_chip *chip) } EXPORT_SYMBOL_GPL(tpm2_probe); +static int tpm2_init_pcr_bank_info(struct tpm_chip *chip, u16 alg_id, + struct tpm_pcr_bank_info *active_bank) +{ + struct tpm_buf buf; + struct tpm2_pcr_read_out *pcrread_out; + int rc = 0; + int i; + + active_bank->alg_id = alg_id; + + rc = tpm2_pcr_read_tpm_buf(chip, 0, alg_id, &buf, NULL); + if (rc) + goto out; + + pcrread_out = (struct tpm2_pcr_read_out *)&buf.data[TPM_HEADER_SIZE]; + + active_bank->digest_size = be16_to_cpu(pcrread_out->digest_size); + active_bank->crypto_id = HASH_ALGO__LAST; + + for (i = 0; i < ARRAY_SIZE(tpm2_hash_map); i++) { + if (active_bank->alg_id != tpm2_hash_map[i].tpm_id) + continue; + + active_bank->crypto_id = tpm2_hash_map[i].crypto_id; + } +out: + tpm_buf_destroy(&buf); + return rc; +} + struct tpm2_pcr_selection { __be16 hash_alg; u8 size_of_select; diff --git a/include/linux/tpm.h b/include/linux/tpm.h index 5a090f5..ff06738 100644 --- a/include/linux/tpm.h +++ b/include/linux/tpm.h @@ -22,6 +22,8 @@ #ifndef __LINUX_TPM_H__ #define __LINUX_TPM_H__ +#include + #define TPM_DIGEST_SIZE 20 /* Max TPM v1.2 PCR size */ /* @@ -37,6 +39,17 @@ enum TPM_OPS_FLAGS { TPM_OPS_AUTO_STARTUP = BIT(0), }; +enum tpm2_algorithms { + TPM2_ALG_ERROR = 0x0000, + TPM2_ALG_SHA1 = 0x0004, + TPM2_ALG_KEYEDHASH = 0x0008, + TPM2_ALG_SHA256 = 0x000B, + TPM2_ALG_SHA384 = 0x000C, + TPM2_ALG_SHA512 = 0x000D, + TPM2_ALG_NULL = 0x0010, + TPM2_ALG_SM3_256 = 0x0012, +}; + struct tpm_class_ops { unsigned int flags; const u8 req_complete_mask; @@ -52,6 +65,12 @@ struct tpm_class_ops { void (*relinquish_locality)(struct tpm_chip *chip, int loc); }; +struct tpm_pcr_bank_info { + enum tpm2_algorithms alg_id; + enum hash_algo crypto_id; + u32 digest_size; +}; + #if defined(CONFIG_TCG_TPM) || defined(CONFIG_TCG_TPM_MODULE) extern int tpm_is_tpm2(u32 chip_num);