From patchwork Wed Sep 6 12:56:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nayna X-Patchwork-Id: 9940653 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DEB4660350 for ; Wed, 6 Sep 2017 13:01:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E17BF28B6A for ; Wed, 6 Sep 2017 13:01:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D658C28B70; Wed, 6 Sep 2017 13:01:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7B25628B6A for ; Wed, 6 Sep 2017 13:01:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754060AbdIFM5g (ORCPT ); Wed, 6 Sep 2017 08:57:36 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:54639 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754112AbdIFM5e (ORCPT ); Wed, 6 Sep 2017 08:57:34 -0400 Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v86CtRhW049883 for ; Wed, 6 Sep 2017 08:57:33 -0400 Received: from e23smtp06.au.ibm.com (e23smtp06.au.ibm.com [202.81.31.148]) by mx0a-001b2d01.pphosted.com with ESMTP id 2ctey80t15-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 06 Sep 2017 08:57:33 -0400 Received: from localhost by e23smtp06.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Wed, 6 Sep 2017 22:57:28 +1000 Received: from d23av02.au.ibm.com (d23av02.au.ibm.com [9.190.235.138]) by d23relay10.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v86CvSA733226954; Wed, 6 Sep 2017 22:57:28 +1000 Received: from d23av02.au.ibm.com (localhost [127.0.0.1]) by d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id v86CvHif015786; Wed, 6 Sep 2017 22:57:18 +1000 Received: from dhcp-9-60-73-202.endicott.ibm.com (dhcp-9-60-73-202.endicott.ibm.com [9.60.73.202]) by d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id v86Cui1B015043; Wed, 6 Sep 2017 22:57:15 +1000 From: Nayna Jain To: tpmdd-devel@lists.sourceforge.net Cc: peterhuewe@gmx.de, tpmdd@selhorst.net, jarkko.sakkinen@linux.intel.com, jgunthorpe@obsidianresearch.com, linux-security-module@vger.kernel.org, linux-kernel@vger.kernel.org, linux-ima-devel@lists.sourceforge.net, patrickc@us.ibm.com, Nayna Jain Subject: [PATCH 1/4] tpm: ignore burstcount to improve tpm_tis send() performance. Date: Wed, 6 Sep 2017 08:56:40 -0400 X-Mailer: git-send-email 2.13.3 In-Reply-To: <20170906125643.5070-1-nayna@linux.vnet.ibm.com> References: <20170906125643.5070-1-nayna@linux.vnet.ibm.com> X-TM-AS-MML: disable x-cbid: 17090612-0040-0000-0000-000003534ADE X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17090612-0041-0000-0000-00000CD16176 Message-Id: <20170906125643.5070-6-nayna@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-09-06_05:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=5 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1709060179 Sender: owner-linux-security-module@vger.kernel.org Precedence: bulk List-ID: X-Virus-Scanned: ClamAV using ClamSMTP The TPM burstcount status indicates the number of bytes that can be sent to the TPM without causing bus wait states. Effectively, it is the number of empty bytes in the command FIFO. Further, some TPMs have a static burstcount, when the value remains zero until the entire FIFO is empty. This patch adds an optimization to check for burstcount only once. And if it is valid, it writes all the bytes at once, permitting wait states. The performance of a 34 byte extend on a TPM 1.2 with an 8 byte burstcount improved from 41 msec to 14 msec. This functionality is enabled only by passing module parameter ignore_burst_count=1. By default, this parameter is disabled. Suggested-by: Ken Goldman in conjunction with the TPM Device Driver work group. Signed-off-by: Nayna Jain Acked-by: Mimi Zohar --- Documentation/admin-guide/kernel-parameters.txt | 8 ++++++++ drivers/char/tpm/tpm_tis_core.c | 24 +++++++++++++++++++++--- 2 files changed, 29 insertions(+), 3 deletions(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 4e303be83df6..3c59bb91e1ee 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -1465,6 +1465,14 @@ mode generally follows that for the NaN encoding, except where unsupported by hardware. + ignore_burst_count [TPM_TIS_CORE] + tpm_tis_core driver queries for the burstcount before + every send call in a loop. However, it causes delay to + the send command for TPMs with low burstcount value. + Setting this value to 1, will make driver to query for + burstcount only once in the loop to improve the + performance. By default, its value is set to 0. + ignore_loglevel [KNL] Ignore loglevel setting - this will print /all/ kernel messages to the console. Useful for debugging. diff --git a/drivers/char/tpm/tpm_tis_core.c b/drivers/char/tpm/tpm_tis_core.c index 63bc6c3b949e..6b9bf4c4d434 100644 --- a/drivers/char/tpm/tpm_tis_core.c +++ b/drivers/char/tpm/tpm_tis_core.c @@ -31,6 +31,11 @@ #include "tpm.h" #include "tpm_tis_core.h" +static bool ignore_burst_count = false; +module_param(ignore_burst_count, bool, 0444); +MODULE_PARM_DESC(ignore_burst_count, + "Ignore burstcount value while writing data"); + /* Before we attempt to access the TPM we must see that the valid bit is set. * The specification says that this bit is 0 at reset and remains 0 until the * 'TPM has gone through its self test and initialization and has established @@ -256,6 +261,7 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len) { struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); int rc, status, burstcnt; + int sendcnt; size_t count = 0; bool itpm = priv->flags & TPM_TIS_ITPM_WORKAROUND; @@ -271,19 +277,31 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len) } while (count < len - 1) { + + /* + * Get the initial burstcount to ensure TPM is ready to + * accept data, even when waiting for burstcount is disabled. + */ burstcnt = get_burstcount(chip); if (burstcnt < 0) { dev_err(&chip->dev, "Unable to read burstcount\n"); rc = burstcnt; goto out_err; } - burstcnt = min_t(int, burstcnt, len - count - 1); + + if (ignore_burst_count) + sendcnt = len - 1; + else + sendcnt = min_t(int, burstcnt, len - count - 1); + rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality), - burstcnt, buf + count); + sendcnt, buf + count); if (rc < 0) goto out_err; - count += burstcnt; + count += sendcnt; + if (ignore_burst_count) + continue; if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, &priv->int_queue, false) < 0) {