@@ -22,5 +22,6 @@
#define CPU_HAS_L2_CACHE 0x0080 /* Secondary cache / URAM */
#define CPU_HAS_OP32 0x0100 /* 32-bit instruction support */
#define CPU_HAS_PTEAEX 0x0200 /* PTE ASID Extension support */
+#define CPU_IS_32BIT_MODE 0x0400 /* linux kernel works 32bit mode */
#endif /* __ASM_SH_CPU_FEATURES_H */
@@ -189,6 +189,10 @@ void __cpuinit cpu_probe(void)
break;
}
+#ifdef CONFIG_32BIT
+ boot_cpu_data.flags |= CPU_IS_32BIT_MODE;
+#endif
+
/*
* On anything that's not a direct-mapped cache, look to the CVR
* for I/D-cache specifics.
@@ -352,7 +352,8 @@ EXPORT_SYMBOL(get_cpu_subtype);
/* Symbolic CPU flags, keep in sync with asm/cpu-features.h */
static const char *cpu_flags[] = {
"none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr",
- "ptea", "llsc", "l2", "op32", "pteaex", NULL
+ "ptea", "llsc", "l2", "op32", "pteaex", "32bit",
+ NULL
};
static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c)
@@ -410,6 +411,11 @@ static int show_cpuinfo(struct seq_file *m, void *v)
else
seq_printf(m, "cut\t\t: %d.%d\n", c->cut_major, c->cut_minor);
+ if (c->flags & CPU_IS_32BIT_MODE)
+ seq_printf(m, "cpu mode\t: 32bit\n");
+ else
+ seq_printf(m, "cpu mode\t: 29bit\n");
+
show_cpuflags(m, c);
seq_printf(m, "cache type\t: ");