From patchwork Thu Aug 30 05:52:49 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 1386531 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 2E6F4DFB6E for ; Thu, 30 Aug 2012 05:52:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751187Ab2H3Fwz (ORCPT ); Thu, 30 Aug 2012 01:52:55 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:50679 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751281Ab2H3Fwz (ORCPT ); Thu, 30 Aug 2012 01:52:55 -0400 Received: from ayumi.akashicho.tokyo.vergenet.net (p6117-ipbfp1901kobeminato.hyogo.ocn.ne.jp [114.172.117.117]) by kirsty.vergenet.net (Postfix) with ESMTP id 1F6F2266CED; Thu, 30 Aug 2012 15:52:54 +1000 (EST) Received: by ayumi.akashicho.tokyo.vergenet.net (Postfix, from userid 7100) id BB023EDE137; Thu, 30 Aug 2012 14:52:52 +0900 (JST) From: Simon Horman To: Arnd Bergmann , Olof Johansson Cc: linux-sh@vger.kernel.org, arm@kernel.org, linux-arm-kernel@lists.infradead.org, Magnus Damm , Paul Mundt , Kuninori Morimoto , Damian Hobson-Garcia , Simon Horman Subject: [PATCH] ARM: shmobile: r8a7740: add USB24 clock explain and sample code Date: Thu, 30 Aug 2012 14:52:49 +0900 Message-Id: <1346305969-27110-2-git-send-email-horms@verge.net.au> X-Mailer: git-send-email 1.7.10.2.484.gcd07cc5 In-Reply-To: <1346305969-27110-1-git-send-email-horms@verge.net.au> References: <1346305969-27110-1-git-send-email-horms@verge.net.au> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org From: Kuninori Morimoto USBCKCR is controlling USB parent clock and divide rate. This parent clock is used as a "usb24s" from other devices, but the "divide rate" is not used. Further, this clock itself is known as "usb24". So, to set this clock is a little confusable. This patch adds quick explain and sample code for this clock. Cc: Damian Hobson-Garcia Signed-off-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/clock-r8a7740.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c index ad5fccc..a6a7583 100644 --- a/arch/arm/mach-shmobile/clock-r8a7740.c +++ b/arch/arm/mach-shmobile/clock-r8a7740.c @@ -188,6 +188,22 @@ static struct clk pllc1_div2_clk = { }; /* USB clock */ +/* + * USBCKCR is controlling usb24 clock + * bit[7] : parent clock + * bit[6] : clock divide rate + * And this bit[7] is used as a "usb24s" from other devices. + * (Video clock / Sub clock / SPU clock) + * You can controll this clock as a below. + * + * struct clk *usb24 = clk_get(dev, "usb24"); + * struct clk *usb24s = clk_get(NULL, "usb24s"); + * struct clk *system = clk_get(NULL, "system_clk"); + * int rate = clk_get_rate(system); + * + * clk_set_parent(usb24s, system); // for bit[7] + * clk_set_rate(usb24, rate / 2); // for bit[6] + */ static struct clk *usb24s_parents[] = { [0] = &system_clk, [1] = &extal2_clk