From patchwork Thu Nov 22 08:00:12 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 1784401 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 180253FC23 for ; Thu, 22 Nov 2012 18:37:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753870Ab2KVSgM (ORCPT ); Thu, 22 Nov 2012 13:36:12 -0500 Received: from mail-da0-f46.google.com ([209.85.210.46]:46698 "EHLO mail-da0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754094Ab2KVSgK (ORCPT ); Thu, 22 Nov 2012 13:36:10 -0500 Received: by mail-da0-f46.google.com with SMTP id p5so2299225dak.19 for ; Thu, 22 Nov 2012 10:36:09 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=SMElO+Bdjl7qirPV5pNmfj7OPRd5ciZe7cJ3pAmU8js=; b=FlMCEFxLWc8sKCRdC+s0Bsl2qcVsj6bxGPNURr/0uKjg2xsQ7DV6SYOXdcJTFIyR1s jH4vJIjYN6o96Oyq4yM9TkON/7Db4PPU7gkxGAtJ/3bDw9+HbKBbdyX0bHBGDUEyuZNJ R4fEdnyFP21hcUh2ui06mdxsKmJ1Dx7p+DrtdaDlZz5RlBxJJF5fx1r0U+RvS/6WODRy 7YT3Zu0r0yNn+aqIPS8/Uf1ilHFpILOIuqsDYZMEaaBOE9VI0IvZOcneBuAihFOT0cqy yJO7YKgGC06X0NMqJkKqbvxY17gn8tlPmSMzduj9L1vwgYeiitLdfGo3G4ERBmJqVXx6 uzVg== Received: by 10.66.81.97 with SMTP id z1mr24668202pax.19.1353571269469; Thu, 22 Nov 2012 00:01:09 -0800 (PST) Received: from xps-iwamatsu.renesas.com (49.14.32.202.bf.2iij.net. [202.32.14.49]) by mx.google.com with ESMTPS id s1sm1507624paz.0.2012.11.22.00.01.07 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 22 Nov 2012 00:01:08 -0800 (PST) From: Nobuhiro Iwamatsu To: linux-sh@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: magnus.damm@gmail.com, horms@verge.net.au, Magnus Damm , Nobuhiro Iwamatsu Subject: [PATCH v5 15/15] ARM: shmobile: sh73a0: Use DT for GIC Date: Thu, 22 Nov 2012 17:00:12 +0900 Message-Id: <1353571213-26006-16-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1353571213-26006-1-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> References: <1353571213-26006-1-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> X-Gm-Message-State: ALoCoQlNB4f8W2e6OabHKj+3VeJgHJJLF9lqt4vfsMvpgnWiRzFmTJ06Rs3VY+ae3W0UjMyeQWz3 Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org From: Simon Horman Cc: Magnus Damm Cc: Nobuhiro Iwamatsu Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/intc-sh73a0.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c index c9f6441..f4076e2 100644 --- a/arch/arm/mach-shmobile/intc-sh73a0.c +++ b/arch/arm/mach-shmobile/intc-sh73a0.c @@ -429,12 +429,9 @@ static irqreturn_t sh73a0_pint1_demux(int irq, void *dev_id) static void __init sh73a0_init_intc(resource_size_t intcs0_start) { - int k, n; - void __iomem *intevtsa; - - intevtsa = ioremap_nocache(intcs0_start + 0x100, PAGE_SIZE); + void __iomem *intevtsa = + ioremap_nocache(intcs0_start + 0x100, PAGE_SIZE); - /* demux using INTEVTSA */ sh73a0_intcs_cascade.name = "INTCS cascade"; sh73a0_intcs_cascade.handler = sh73a0_intcs_demux; sh73a0_intcs_cascade.dev_id = intevtsa; @@ -500,6 +497,7 @@ static int __init intc_of_init(struct device_node *np, } static const struct of_device_id irq_of_match[] __initconst = { + { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, } { .compatible = "renesas,sh_intc", .data = intc_of_init }, { /*sentinel*/ } }; @@ -514,10 +512,8 @@ void __init sh73a0_init_irq_of(void) void __init sh73a0_init_irq(void) { - void __iomem *gic_dist_base = IOMEM(0xf0001000); - void __iomem *gic_cpu_base = IOMEM(0xf0000100); - gic_init(0, 29, gic_dist_base, gic_cpu_base); + gic_init(0, 29, IOMEM(0xf0001000), IOMEM(0xf0000100)); gic_arch_extn.irq_set_wake = sh73a0_set_wake; register_intc_controller(&intcs_desc);