From patchwork Tue Apr 9 14:35:15 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Edworthy X-Patchwork-Id: 2415591 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 238033FC71 for ; Tue, 9 Apr 2013 14:36:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S936167Ab3DIOf7 (ORCPT ); Tue, 9 Apr 2013 10:35:59 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:47811 "EHLO relmlor1.renesas.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935016Ab3DIOf7 (ORCPT ); Tue, 9 Apr 2013 10:35:59 -0400 Received: from relmlir3.idc.renesas.com ([10.200.68.153]) by relmlor1.idc.renesas.com ( SJSMS) with ESMTP id <0MKZ00H8QSJX9850@relmlor1.idc.renesas.com> for linux-sh@vger.kernel.org; Tue, 09 Apr 2013 23:35:58 +0900 (JST) Received: from relmlac2.idc.renesas.com ([10.200.69.22]) by relmlir3.idc.renesas.com ( SJSMS) with ESMTP id <0MKZ00GTBSJXBPE0@relmlir3.idc.renesas.com> for linux-sh@vger.kernel.org; Tue, 09 Apr 2013 23:35:57 +0900 (JST) Received: by relmlac2.idc.renesas.com (Postfix, from userid 0) id C865F280A4; Tue, 09 Apr 2013 23:35:57 +0900 (JST) Received: from relmlac2.idc.renesas.com (localhost [127.0.0.1]) by relmlac2.idc.renesas.com (Postfix) with ESMTP id C2F25280A0; Tue, 09 Apr 2013 23:35:57 +0900 (JST) Received: from relmlii1.idc.renesas.com [10.200.68.65] by relmlac2.idc.renesas.com with ESMTP id ZAE02460; Tue, 09 Apr 2013 23:35:57 +0900 X-IronPort-AV: E=Sophos; i="4.87,439,1363100400"; d="scan'208"; a="123353066" Received: from unknown (HELO relay41.aps.necel.com) ([10.29.19.9]) by relmlii1.idc.renesas.com with ESMTP; Tue, 09 Apr 2013 23:35:57 +0900 Received: from julia (du2com5.eu.necel.com [172.29.24.35] (may be forged)) by relay41.aps.necel.com (8.14.4+Sun/8.14.4) with ESMTP id r39EZu2V001926; Tue, 09 Apr 2013 23:35:57 +0900 (JST) Received: by julia (Postfix, from userid 2) id 8FDBC4EAEB; Tue, 09 Apr 2013 16:35:58 +0200 (CEST) Received: from du0smtp.eu.necel.com (unknown [172.29.24.86]) by julia (Postfix) with ESMTP id 8416F4EAE5; Tue, 09 Apr 2013 16:35:58 +0200 (CEST) Received: from duacsls.ad.ree.renesas.com ([172.29.43.47]) by du0smtp.eu.necel.com (Lotus Domino Release 8.5.3 HF466) with ESMTP id 2013040916355573-196135 ; Tue, 09 Apr 2013 16:35:55 +0200 From: Phil Edworthy To: Simon Cc: linux-sh@vger.kernel.org, Magnus , Sergei Shtylyov , Phil Edworthy Subject: [PATCH v3] ARM: shmobile: r8a7779: Add PCIe clocks X-Mailer: git-send-email 1.7.5.4 In-reply-to: <20130409133159.GA21410@verge.net.au> References: <20130409133159.GA21410@verge.net.au> X-TNEFEvaluated: 1 Message-id: <1365518115-4410-1-git-send-email-phil.edworthy@renesas.com> Date: Tue, 09 Apr 2013 15:35:15 +0100 X-MIMETrack: Itemize by SMTP Server on DU0SMTP/EE/NECEE(Release 8.5.3 HF466|March 09, 2012) at 09.04.2013 16:35:55, Serialize by Router on DU0SMTP/EE/NECEE(Release 8.5.3 HF466|March 09, 2012) at 09.04.2013 16:35:56, Serialize complete at 09.04.2013 16:35:56 Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org Signed-off-by: Phil Edworthy --- v3: Rebased on renesas soc branch again. v2: Rebased on renesas soc branch. Removed ".0" from clock name. arch/arm/mach-shmobile/clock-r8a7779.c | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index 7d86bfb..f66cf85 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c @@ -93,7 +93,7 @@ static struct clk *main_clks[] = { }; enum { MSTP323, MSTP322, MSTP321, MSTP320, - MSTP115, + MSTP116, MSTP115, MSTP103, MSTP101, MSTP100, MSTP030, MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, @@ -106,6 +106,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP322] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 22, 0), /* SDHI1 */ [MSTP321] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 21, 0), /* SDHI2 */ [MSTP320] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 20, 0), /* SDHI3 */ + [MSTP116] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 16, 0), /* PCIe */ [MSTP115] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 15, 0), /* SATA */ [MSTP103] = SH_CLK_MSTP32(&clks_clk, MSTPCR1, 3, 0), /* DU */ [MSTP101] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 1, 0), /* USB2 */ @@ -141,6 +142,7 @@ static struct clk_lookup lookups[] = { CLKDEV_CON_ID("peripheral_clk", &clkp_clk), /* MSTP32 clocks */ + CLKDEV_DEV_ID("rcar-pcie", &mstp_clks[MSTP116]), /* PCIe */ CLKDEV_DEV_ID("sata_rcar", &mstp_clks[MSTP115]), /* SATA */ CLKDEV_DEV_ID("fc600000.sata", &mstp_clks[MSTP115]), /* SATA w/DT */ CLKDEV_DEV_ID("ehci-platform.1", &mstp_clks[MSTP101]), /* USB EHCI port2 */