From patchwork Thu Jun 6 15:48:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 2681701 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 52982DFE86 for ; Thu, 6 Jun 2013 15:48:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752776Ab3FFPs2 (ORCPT ); Thu, 6 Jun 2013 11:48:28 -0400 Received: from moutng.kundenserver.de ([212.227.126.171]:65238 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752789Ab3FFPs0 (ORCPT ); Thu, 6 Jun 2013 11:48:26 -0400 Received: from axis700.grange (dslb-088-077-167-013.pools.arcor-ip.net [88.77.167.13]) by mrelayeu.kundenserver.de (node=mreu1) with ESMTP (Nemesis) id 0M0MsD-1UWVoi0Adp-00uKT9; Thu, 06 Jun 2013 17:48:25 +0200 Received: from 6a.grange (6a.grange [192.168.1.11]) by axis700.grange (Postfix) with ESMTPS id B5B0C40BB6; Thu, 6 Jun 2013 17:48:24 +0200 (CEST) Received: from lyakh by 6a.grange with local (Exim 4.72) (envelope-from ) id 1UkcQK-0006BO-LD; Thu, 06 Jun 2013 17:48:24 +0200 From: Guennadi Liakhovetski To: linux-sh@vger.kernel.org Cc: Magnus Damm , Simon Horman Subject: [PATCH v2 3/6] ARM: shmobile: add SDHI and MMCIF interfaces to armadillo800eva-reference Date: Thu, 6 Jun 2013 17:48:21 +0200 Message-Id: <1370533704-23734-4-git-send-email-g.liakhovetski@gmx.de> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1370533704-23734-1-git-send-email-g.liakhovetski@gmx.de> References: <1370533704-23734-1-git-send-email-g.liakhovetski@gmx.de> X-Provags-ID: V02:K0:4k9cvDPPI0JaHAHWA3ZOntrjaYje9FFME4cOBc9X+yl Qo90toSK+cubcxSq+c6L4T1kr44JbcTLfs26i6kwI043FDpexW vymRLq0sllNH/Lte1efekhPoZgWI2oAtbmEeD961SvOlzjLJ/U tVLJDIqX5+Op/Lp0EaKtkQQBngW2GKrgnVBcFK0g2Zb0+edySE HQt1VO66NVy5GzmZXxPkIBq+4SWxTrAgdH3c3HYIOW6ZNvkvAf 6VyVJpcm89Wt26hC1PYIBhWmA8nONCmy6mbJuyBXtyyZHjojtB bw9tuW1GV+47AtStgxk1pbJbyjN8RSnEhnnkpET7C8YylMZJxh AWiVEvmNQj9pImKfN1KTtdKscrA17sWEhy5XiDWOHuDm42GpQ0 HwzmRm88Sf0DQ== Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org Add SDHI0, SDHI1 and MMCIF interfaces to armadillo800eva-reference. With no pinctrl DT support we cannot use GPIO card-detection and regulator switching. Signed-off-by: Guennadi Liakhovetski --- .../boot/dts/r8a7740-armadillo800eva-reference.dts | 21 +++++++++++- arch/arm/boot/dts/r8a7740.dtsi | 33 ++++++++++++++++++ .../board-armadillo800eva-reference.c | 36 +++++++++++++++++++- 3 files changed, 88 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts index 09ea22c..3752637 100644 --- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts +++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts @@ -32,7 +32,6 @@ regulator-always-on; regulator-boot-on; }; - }; &i2c0 { @@ -43,3 +42,23 @@ interrupts = <2 0>; /* IRQ10: hwirq 2 on irqpin1 */ }; }; + +&mmcif0 { + vmmc-supply = <®_3p3v>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&sdhi0 { + vmmc-supply = <®_3p3v>; + bus-width = <4>; + broken-cd; + status = "okay"; +}; + +&sdhi1 { + vmmc-supply = <®_3p3v>; + bus-width = <4>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi index 25dc930..e9a90d8 100644 --- a/arch/arm/boot/dts/r8a7740.dtsi +++ b/arch/arm/boot/dts/r8a7740.dtsi @@ -135,4 +135,37 @@ 0 72 0x4 0 73 0x4>; }; + + mmcif0: mmcif@e6bd0000 { + compatible = "renesas,sh-mmcif", "renesas,sh7372-mmcif"; + reg = <0xe6bd0000 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 56 4 + 0 57 4>; + status = "disabled"; + }; + + sdhi0: sdhi@e6850000 { + compatible = "renesas,r8a7740-sdhi"; + reg = <0xe6850000 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 117 4 + 0 118 4 + 0 119 4>; + cap-sd-highspeed; + cap-sdio-irq; + status = "disabled"; + }; + + sdhi1: sdhi@e6860000 { + compatible = "renesas,r8a7740-sdhi"; + reg = <0xe6860000 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 121 4 + 0 122 4 + 0 123 4>; + cap-sd-highspeed; + cap-sdio-irq; + status = "disabled"; + }; }; diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c index 03b85fe..d26a9da 100644 --- a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c +++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c @@ -123,6 +123,27 @@ static const struct pinctrl_map eva_pinctrl_map[] = { /* SCIFA1 */ PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.1", "pfc-r8a7740", "scifa1_data", "scifa1"), + /* MMCIF */ + PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.sh-mmcif", "pfc-r8a7740", + "mmc0_data8_1", "mmc0"), + PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.sh-mmcif", "pfc-r8a7740", + "mmc0_ctrl_1", "mmc0"), + /* SDHI0 */ + PIN_MAP_MUX_GROUP_DEFAULT("e6850000.sdhi", "pfc-r8a7740", + "sdhi0_data4", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("e6850000.sdhi", "pfc-r8a7740", + "sdhi0_ctrl", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("e6850000.sdhi", "pfc-r8a7740", + "sdhi0_wp", "sdhi0"), + /* SDHI1 */ + PIN_MAP_MUX_GROUP_DEFAULT("e6860000.sdhi", "pfc-r8a7740", + "sdhi1_data4", "sdhi1"), + PIN_MAP_MUX_GROUP_DEFAULT("e6860000.sdhi", "pfc-r8a7740", + "sdhi1_ctrl", "sdhi1"), + PIN_MAP_MUX_GROUP_DEFAULT("e6860000.sdhi", "pfc-r8a7740", + "sdhi1_cd", "sdhi1"), + PIN_MAP_MUX_GROUP_DEFAULT("e6860000.sdhi", "pfc-r8a7740", + "sdhi1_wp", "sdhi1"), }; static void __init eva_clock_init(void) @@ -165,7 +186,6 @@ clock_error: */ static void __init eva_init(void) { - r8a7740_clock_init(MD_CK0 | MD_CK2); eva_clock_init(); @@ -180,6 +200,20 @@ static void __init eva_init(void) */ gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */ + /* SDHI0 */ + gpio_request_one(17, GPIOF_OUT_INIT_LOW, NULL); /* SDHI0_18/33_B */ + gpio_request_one(74, GPIOF_OUT_INIT_HIGH, NULL); /* SDHI0_PON */ + gpio_request_one(75, GPIOF_OUT_INIT_HIGH, NULL); /* SDSLOT1_PON */ + + /* We can switch CON8/CON14 by SW1.5, but only after DBGMD_SELECT_B */ + gpio_request_one(6, GPIOF_IN, NULL); + if (!gpio_get_value(6)) { + /* CON14 disabled, CON8 (SDHI1) enabled */ + + /* SDSLOT2_PON */ + gpio_request_one(16, GPIOF_OUT_INIT_HIGH, NULL); + } + #ifdef CONFIG_CACHE_L2X0 /* Early BRESP enable, Shared attribute override enable, 32K*8way */ l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff);