From patchwork Fri Jul 19 20:22:56 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 2830691 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 23DFE9F3EB for ; Fri, 19 Jul 2013 20:25:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1AC2920206 for ; Fri, 19 Jul 2013 20:25:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1B287200DE for ; Fri, 19 Jul 2013 20:25:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751854Ab3GSUXk (ORCPT ); Fri, 19 Jul 2013 16:23:40 -0400 Received: from moutng.kundenserver.de ([212.227.126.171]:51438 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751444Ab3GSUXG (ORCPT ); Fri, 19 Jul 2013 16:23:06 -0400 Received: from axis700.grange (dslb-178-006-255-036.pools.arcor-ip.net [178.6.255.36]) by mrelayeu.kundenserver.de (node=mreu0) with ESMTP (Nemesis) id 0ME295-1Uv3Co394x-00H82E; Fri, 19 Jul 2013 22:22:58 +0200 Received: from 6a.grange (6a.grange [192.168.1.11]) by axis700.grange (Postfix) with ESMTPS id 4F05540BB7; Fri, 19 Jul 2013 22:22:57 +0200 (CEST) Received: from lyakh by 6a.grange with local (Exim 4.72) (envelope-from ) id 1V0HCb-000815-1C; Fri, 19 Jul 2013 22:22:57 +0200 From: Guennadi Liakhovetski To: linux-kernel@vger.kernel.org Cc: Simon Horman , Magnus Damm , linux-sh@vger.kernel.org, Vinod Koul , Laurent Pinchart , Sergei Shtylyov , Guennadi Liakhovetski Subject: [PATCH v2 15/15] ARM: shmobile: r8a7740: add support for 2 RTDMACs Date: Fri, 19 Jul 2013 22:22:56 +0200 Message-Id: <1374265376-30777-6-git-send-email-g.liakhovetski@gmx.de> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1374251374-30186-1-git-send-email-g.liakhovetski@gmx.de> References: <1374251374-30186-1-git-send-email-g.liakhovetski@gmx.de> X-Provags-ID: V02:K0:kUGfYP3NUkjHStIiJdONbxx6uXq/1jeNx2p9S/+Nt0D kcb0H7t3u98lVqpDHMR+miJ9ydeFfMWLy3CuCy6KHYOB7ncIUO fXXoa0pQUrezjyrWu1N+1UYgPca4cm+64ssmAJ4jPqGTBEJf8G r2Zz0QOpNc+pJg43b7fXUqTfjoPX8as7n1tTsvWtyc91z2GBUz HaU+sMKFKRkeyKyX5mhFeE+k4t/+cJhS+wJMNzZfNXZbxOOZ1c 4idTkvoSPg6wIUd/2auHZ53PUKt+ZNbJvAb9zI0WlN54VftBHF 5ed1MW8NSCPUfmGNtqlUypzpjtpo22gzpfkWPO9p/tNMUmFdgb 8CDt7lD72s+2qM9dvEeUuhJ6QZ2Fu1bi77Sb4qXT3egLfev92a bZooqHlq2gajA== Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In addition to 3 SYS-DMACs, r817740 SoCs also have 2 RT-DMACs. This patch adds support for them in both DT- amd non-DT-modes. Signed-off-by: Guennadi Liakhovetski --- arch/arm/boot/dts/r8a7740.dtsi | 34 +++++++++++++++ arch/arm/mach-shmobile/clock-r8a7740.c | 8 ++++ arch/arm/mach-shmobile/setup-r8a7740.c | 72 ++++++++++++++++++++++++++++++++ 3 files changed, 114 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi index 4797f1e..638ada2 100644 --- a/arch/arm/boot/dts/r8a7740.dtsi +++ b/arch/arm/boot/dts/r8a7740.dtsi @@ -175,6 +175,40 @@ "ch0", "ch1", "ch2", "ch3", "ch4", "ch5"; }; + + dma3: dma-controller@ffc18020 { + compatible = "renesas,shdma-r8a7740"; + reg = <0xffc18020 0x270>, + <0xffc19000 0xc>; + interrupt-parent = <&gic>; + interrupts = <0 196 4 + 0 190 4 + 0 191 4 + 0 192 4 + 0 193 4 + 0 194 4 + 0 195 4>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5"; + }; + + dma4: dma-controller@ffc28020 { + compatible = "renesas,shdma-r8a7740"; + reg = <0xffc28020 0x270>, + <0xffc29000 0xc>; + interrupt-parent = <&gic>; + interrupts = <0 158 4 + 0 152 4 + 0 153 4 + 0 154 4 + 0 155 4 + 0 156 4 + 0 157 4>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5"; + }; }; i2c0: i2c@fff20000 { diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c index 4e76fb8..2e67f6a 100644 --- a/arch/arm/mach-shmobile/clock-r8a7740.c +++ b/arch/arm/mach-shmobile/clock-r8a7740.c @@ -451,6 +451,8 @@ static struct clk fsidivs[] = { /* MSTP */ enum { + MSTP023, MSTP021, + MSTP128, MSTP127, MSTP125, MSTP116, MSTP111, MSTP100, MSTP117, @@ -469,6 +471,8 @@ enum { }; static struct clk mstp_clks[MSTP_NR] = { + [MSTP021] = SH_CLK_MSTP32(&div4_clks[DIV4_S], SMSTPCR0, 21, 0), /* RT-DMAC1 */ + [MSTP023] = SH_CLK_MSTP32(&div4_clks[DIV4_S], SMSTPCR0, 23, 0), /* RT-DMAC2 */ [MSTP128] = SH_CLK_MSTP32(&div4_clks[DIV4_S], SMSTPCR1, 28, 0), /* CEU21 */ [MSTP127] = SH_CLK_MSTP32(&div4_clks[DIV4_S], SMSTPCR1, 27, 0), /* CEU20 */ [MSTP125] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */ @@ -547,6 +551,10 @@ static struct clk_lookup lookups[] = { CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]), /* MSTP32 clocks */ + CLKDEV_DEV_ID("shdma-r8a7740.4", &mstp_clks[MSTP021]), + CLKDEV_DEV_ID("ffc18020.dma-controller",&mstp_clks[MSTP021]), + CLKDEV_DEV_ID("shdma-r8a7740.5", &mstp_clks[MSTP023]), + CLKDEV_DEV_ID("ffc28020.dma-controller",&mstp_clks[MSTP023]), CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), CLKDEV_DEV_ID("sh_tmu.3", &mstp_clks[MSTP111]), CLKDEV_DEV_ID("sh_tmu.4", &mstp_clks[MSTP111]), diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c index 01dcb3b..2dc2d652 100644 --- a/arch/arm/mach-shmobile/setup-r8a7740.c +++ b/arch/arm/mach-shmobile/setup-r8a7740.c @@ -626,6 +626,62 @@ static struct resource r8a7740_dmae2_resources[] = { }, }; +/* Resource order important! */ +static struct resource r8a7740_rtdma0_resources[] = { + { + /* Channel registers and DMAOR */ + .start = 0xffc18020, + .end = 0xffc1828f, + .flags = IORESOURCE_MEM, + }, + { + /* DMARSx */ + .start = 0xffc19000, + .end = 0xffc1900b, + .flags = IORESOURCE_MEM, + }, + { + .name = "error_irq", + .start = gic_spi(196), + .end = gic_spi(196), + .flags = IORESOURCE_IRQ, + }, + { + /* IRQ for channels 0-5 */ + .start = gic_spi(190), + .end = gic_spi(195), + .flags = IORESOURCE_IRQ, + }, +}; + +/* Resource order important! */ +static struct resource r8a7740_rtdma1_resources[] = { + { + /* Channel registers and DMAOR */ + .start = 0xffc28020, + .end = 0xffc2828f, + .flags = IORESOURCE_MEM, + }, + { + /* DMARSx */ + .start = 0xffc29000, + .end = 0xffc2900b, + .flags = IORESOURCE_MEM, + }, + { + .name = "error_irq", + .start = gic_spi(158), + .end = gic_spi(158), + .flags = IORESOURCE_IRQ, + }, + { + /* IRQ for channels 0-5 */ + .start = gic_spi(152), + .end = gic_spi(157), + .flags = IORESOURCE_IRQ, + }, +}; + static struct platform_device dma0_device = { .name = "shdma-r8a7740", .id = 0, @@ -647,6 +703,20 @@ static struct platform_device dma2_device = { .num_resources = ARRAY_SIZE(r8a7740_dmae2_resources), }; +static struct platform_device rtdma0_device = { + .name = "shdma-r8a7740", + .id = 4, + .resource = r8a7740_rtdma0_resources, + .num_resources = ARRAY_SIZE(r8a7740_rtdma0_resources), +}; + +static struct platform_device rtdma1_device = { + .name = "shdma-r8a7740", + .id = 5, + .resource = r8a7740_rtdma1_resources, + .num_resources = ARRAY_SIZE(r8a7740_rtdma1_resources), +}; + /* USB-DMAC */ static const struct sh_dmae_channel r8a7740_usb_dma_channels[] = { { @@ -781,6 +851,8 @@ static struct platform_device *r8a7740_late_devices[] __initdata = { &dma0_device, &dma1_device, &dma2_device, + &rtdma0_device, + &rtdma1_device, &usb_dma_device, &pmu_device, };