From patchwork Mon Sep 9 16:03:53 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 2862371 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 401D7BF43F for ; Mon, 9 Sep 2013 16:05:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E9E3B20154 for ; Mon, 9 Sep 2013 16:05:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A27772009C for ; Mon, 9 Sep 2013 16:05:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755212Ab3IIQEC (ORCPT ); Mon, 9 Sep 2013 12:04:02 -0400 Received: from moutng.kundenserver.de ([212.227.17.8]:50044 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755133Ab3IIQD6 (ORCPT ); Mon, 9 Sep 2013 12:03:58 -0400 Received: from axis700.grange (dslb-178-006-084-108.pools.arcor-ip.net [178.6.84.108]) by mrelayeu.kundenserver.de (node=mrbap4) with ESMTP (Nemesis) id 0LvAri-1W1N5b0FuM-010Pfg; Mon, 09 Sep 2013 18:03:57 +0200 Received: from 6a.grange (6a.grange [192.168.1.11]) by axis700.grange (Postfix) with ESMTPS id A193240BB4; Mon, 9 Sep 2013 18:03:56 +0200 (CEST) Received: from lyakh by 6a.grange with local (Exim 4.72) (envelope-from ) id 1VJ3wS-0002vN-Gd; Mon, 09 Sep 2013 18:03:56 +0200 From: Guennadi Liakhovetski To: linux-kernel@vger.kernel.org Cc: Magnus Damm , linux-sh@vger.kernel.org, Linus Walleij , Guennadi Liakhovetski Subject: [PATCH 1/4] pinctrl: sh-pfc: r8a7790: add pin definitions for the I2C3 interface Date: Mon, 9 Sep 2013 18:03:53 +0200 Message-Id: <1378742636-11215-2-git-send-email-g.liakhovetski@gmx.de> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1378742636-11215-1-git-send-email-g.liakhovetski@gmx.de> References: <1378742636-11215-1-git-send-email-g.liakhovetski@gmx.de> X-Provags-ID: V02:K0:1OAHxN5IIaPiPbvuvp70kMmkQSGpRNypSgjGQnQhjkj YdCl4FNDkZEX5XmA4BO+lUKhPg6PUSKg0yWWVcXLMzN88ZsV9G mn5eLSa5CrX8Ly29dT+Lxw/EAPdpNW07i+WrPJtpNT8nLjUj+a q3NMH6VZIIBtbxHu1fGrHEvT5LAQYcOYfimMlk49NieoGRChUF 8fn0WJAjr8qcKDaNuHFammeM4EAADRJiJ/kozRZvNt0uPmaazA Rk+YqdIsQ+olm0/nvPtCPxLs9/A7OL99u8a2paDVxPmk/qh4O6 XJfJtzBKKyzPMyxor9pzBW4AGR8TAg0nXc8ejMJQ7V+0z54eMR Zhs58gFAFh4OvsNZRcOhByLeup/b6wIWNvSGKvO7PVnCLk6/IQ RxSRiynjv3Ruw== Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There are four I2C interfaces on r8a7790, each of them can be connected to one of the two respective I2C controllers, e.g. interface #0 can be configured to work with I2C0 or with IIC0. Additionally some of those interfaces can also use one of several pin sets. Interface #3 is special, because it can be used in automatic mode for DVFS. It only has one set of pins available and those pins cannot be used for anything else, they also lack the GPIO function. This patch uses the sh-pfc ability to configure pins, not associated with GPIOs and adds support for I2C3 to the r8a7790 PFC set up. Signed-off-by: Guennadi Liakhovetski --- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 28 ++++++++++++++++++++++++++++ 1 files changed, 28 insertions(+), 0 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c index 64fcc006..c3c4d9b 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c @@ -781,6 +781,8 @@ enum { ADICS_SAMP_MARK, DU2_CDE_MARK, QPOLB_MARK, SCIFA2_RXD_B_MARK, USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK, TCLK1_B_MARK, + + I2C3_SCL_MARK, I2C3_SDA_MARK, PINMUX_MARK_END, }; @@ -1719,10 +1721,22 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_DATA(IP16_6, AUDIO_CLKOUT_D), PINMUX_IPSR_DATA(IP16_7, USB1_OVC), PINMUX_IPSR_MODSEL_DATA(IP16_7, TCLK1_B, SEL_TMU1_1), + + PINMUX_DATA(I2C3_SCL_MARK, FN_SEL_IICDVFS_1), + PINMUX_DATA(I2C3_SDA_MARK, FN_SEL_IICDVFS_1), }; +/* R8A7790 has 6 banks with 32 GPIOs in each = 192 GPIOs */ +#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r)) +#define PIN_NUMBER(r, c) (((r) - 'A') * 16 + (c) + 200) +#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c) + static struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), + + /* Pins not associated with a GPIO port */ + SH_PFC_PIN_NAMED(ROW_GROUP_A('J'), 15, AJ15), + SH_PFC_PIN_NAMED(ROW_GROUP_A('H'), 15, AH15), }; /* - DU RGB ----------------------------------------------------------------- */ @@ -1990,6 +2004,14 @@ static const unsigned int hscif1_ctrl_b_pins[] = { static const unsigned int hscif1_ctrl_b_mux[] = { HRTS1_N_B_MARK, HCTS1_N_B_MARK, }; +/* - I2C3 ------------------------------------------------------------------- */ +static const unsigned int i2c3_pins[] = { + /* SCL, SDA */ + PIN_A_NUMBER('J', 15), PIN_A_NUMBER('H', 15), +}; +static const unsigned int i2c3_mux[] = { + I2C3_SCL_MARK, I2C3_SDA_MARK, +}; /* - INTC ------------------------------------------------------------------- */ static const unsigned int intc_irq0_pins[] = { /* IRQ */ @@ -3047,6 +3069,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(hscif1_data_b), SH_PFC_PIN_GROUP(hscif1_clk_b), SH_PFC_PIN_GROUP(hscif1_ctrl_b), + SH_PFC_PIN_GROUP(i2c3), SH_PFC_PIN_GROUP(intc_irq0), SH_PFC_PIN_GROUP(intc_irq1), SH_PFC_PIN_GROUP(intc_irq2), @@ -3243,6 +3266,10 @@ static const char * const hscif1_groups[] = { "hscif1_ctrl_b", }; +static const char * const i2c3_groups[] = { + "i2c3", +}; + static const char * const intc_groups[] = { "intc_irq0", "intc_irq1", @@ -3469,6 +3496,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(eth), SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), + SH_PFC_FUNCTION(i2c3), SH_PFC_FUNCTION(intc), SH_PFC_FUNCTION(mmc0), SH_PFC_FUNCTION(mmc1),