From patchwork Tue Oct 1 18:30:49 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Valentine Barshak X-Patchwork-Id: 2971371 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 27E169F245 for ; Tue, 1 Oct 2013 18:31:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 216B3201C0 for ; Tue, 1 Oct 2013 18:31:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EF2E12012E for ; Tue, 1 Oct 2013 18:31:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751390Ab3JASbB (ORCPT ); Tue, 1 Oct 2013 14:31:01 -0400 Received: from mail-la0-f48.google.com ([209.85.215.48]:56314 "EHLO mail-la0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751479Ab3JASbA (ORCPT ); Tue, 1 Oct 2013 14:31:00 -0400 Received: by mail-la0-f48.google.com with SMTP id er20so6105581lab.7 for ; Tue, 01 Oct 2013 11:30:59 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZsKjmswpp8I2T9S1y6FOJ/7uIljPa8j8cNmDf8uZMPU=; b=LqDjslgoYieYC+nkufb0JobqurlNU/mvSuu4TuxcNalzFuv2vbUBTMiIAUiSz2QWTQ f8qiNEdd7MeBvOPE3vwhldEDEpqKB3kZThA0Nw78JvndpjNX7Uz5dwx4BmNVDePNVYO3 DElH1amvtugggbT/BUANRtMqQJwy2jE3c5mouME9jZthzTk/6RXTzvV+fcUGet+UpjgO nSCWZY5blJKlGIEpxoQWQ2usThLXnYz4PMHywsJuIZQ7evxQryGRe2BDAXu0qdHpYcVY CiDjD6v+JCES1xKrMS9FvQ9tA/Hp5l89SjBoZvACs//Ut+EF3apk2mhp99a4udKfpY/Q MVVg== X-Gm-Message-State: ALoCoQnQ5m9iVQFaa6kUT1UJGrYZASI6822WqchtQSC4X94DDQ/PNWtzYl/SV4nl+NLMI0Z7pLJ0 X-Received: by 10.112.157.67 with SMTP id wk3mr3165454lbb.32.1380652259232; Tue, 01 Oct 2013 11:30:59 -0700 (PDT) Received: from black.localnet ([93.100.122.208]) by mx.google.com with ESMTPSA id e4sm4831790lba.15.1969.12.31.16.00.00 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 01 Oct 2013 11:30:58 -0700 (PDT) From: Valentine Barshak To: linux-sh@vger.kernel.org Cc: Simon Horman , Magnus Damm , Laurent Pinchart , Guennadi Liakhovetski Subject: [PATCH 4/6] arm: shmobile: r8a7790: Add PCI/USB host clock support Date: Tue, 1 Oct 2013 22:30:49 +0400 Message-Id: <1380652251-8143-5-git-send-email-valentine.barshak@cogentembedded.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1380652251-8143-1-git-send-email-valentine.barshak@cogentembedded.com> References: <1380652251-8143-1-git-send-email-valentine.barshak@cogentembedded.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds PCI/USB host clock support. Signed-off-by: Valentine Barshak --- arch/arm/mach-shmobile/clock-r8a7790.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c index cf4abba..9061c70 100644 --- a/arch/arm/mach-shmobile/clock-r8a7790.c +++ b/arch/arm/mach-shmobile/clock-r8a7790.c @@ -186,7 +186,7 @@ enum { MSTP813, MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720, MSTP717, MSTP716, - MSTP704, + MSTP704, MSTP703, MSTP522, MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, @@ -210,6 +210,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */ [MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */ [MSTP704] = SH_CLK_MSTP32(&mp_clk, SMSTPCR7, 4, 0), /* HS_USB */ + [MSTP703] = SH_CLK_MSTP32(&mp_clk, SMSTPCR7, 3, 0), /* EHCI */ [MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */ [MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */ [MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */ @@ -299,6 +300,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]), CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]), CLKDEV_CON_ID("hsusb", &mstp_clks[MSTP704]), + CLKDEV_ICK_ID("ehci", "pci-rcar-gen2", &mstp_clks[MSTP703]), }; #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \