From patchwork Wed May 28 07:23:59 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Edworthy X-Patchwork-Id: 4253151 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id BB74F9F32B for ; Wed, 28 May 2014 07:29:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0A69A202E6 for ; Wed, 28 May 2014 07:29:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CC301202E5 for ; Wed, 28 May 2014 07:29:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753853AbaE1H3j (ORCPT ); Wed, 28 May 2014 03:29:39 -0400 Received: from relmlor3.renesas.com ([210.160.252.173]:62795 "EHLO relmlie2.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754183AbaE1H3i (ORCPT ); Wed, 28 May 2014 03:29:38 -0400 Received: from unknown (HELO relmlir2.idc.renesas.com) ([10.200.68.152]) by relmlie2.idc.renesas.com with ESMTP; 28 May 2014 16:29:37 +0900 Received: from relmlac2.idc.renesas.com (relmlac2.idc.renesas.com [10.200.69.22]) by relmlir2.idc.renesas.com (Postfix) with ESMTP id 9B33542406; Wed, 28 May 2014 16:29:37 +0900 (JST) Received: by relmlac2.idc.renesas.com (Postfix, from userid 0) id 8E893280A6; Wed, 28 May 2014 16:29:37 +0900 (JST) Received: from relmlac2.idc.renesas.com (localhost [127.0.0.1]) by relmlac2.idc.renesas.com (Postfix) with ESMTP id 8A1DB280A0; Wed, 28 May 2014 16:29:37 +0900 (JST) Received: from relmlii1.idc.renesas.com [10.200.68.65] by relmlac2.idc.renesas.com with ESMTP id SAT18029; Wed, 28 May 2014 16:29:37 +0900 X-IronPort-AV: E=Sophos;i="4.98,926,1392130800"; d="scan'208";a="160784156" Received: from unknown (HELO relay41.aps.necel.com) ([10.29.19.9]) by relmlii1.idc.renesas.com with ESMTP; 28 May 2014 16:29:37 +0900 Received: from DU0NOTES13.ad.ree.renesas.com ([172.29.24.131]) by relay41.aps.necel.com (8.14.4+Sun/8.14.4) with ESMTP id s4S6570x019525; Wed, 28 May 2014 16:29:36 +0900 (JST) Received: from duacsls.ad.ree.renesas.com ([172.29.43.47]) by DU0NOTES13.ad.ree.renesas.com (Lotus Domino Release 8.5.3 HF466) with ESMTP id 2014052809240880-209602 ; Wed, 28 May 2014 09:24:08 +0200 From: Phil Edworthy To: Simon Cc: linux-sh@vger.kernel.org, Phil Edworthy X-Mailer: git-send-email 1.9.3 In-Reply-To: <1401261843-6964-1-git-send-email-phil.edworthy@renesas.com> References: <1401261843-6964-1-git-send-email-phil.edworthy@renesas.com> X-TNEFEvaluated: 1 Message-ID: <1401261843-6964-5-git-send-email-phil.edworthy@renesas.com> Date: Wed, 28 May 2014 08:23:59 +0100 Subject: [PATCH 4/8] ARM: shmobile: lager: Add dummy PCIe bus clock X-MIMETrack: Itemize by SMTP Server on DU0NOTES13/SERVER/REE(Release 8.5.3 HF466|March 09, 2012) at 28.05.2014 09:24:09, Serialize by Router on DU0NOTES13/SERVER/REE(Release 8.5.3 HF466|March 09, 2012) at 28.05.2014 09:29:36, Serialize complete at 28.05.2014 09:29:36 Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Since the CPU's dtsi refers to pcie_bus_clock, we need an entry in the board's dts, even if we aren't using PCIe. Signed-off-by: Phil Edworthy --- arch/arm/boot/dts/r8a7790-lager.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index 9becef7..6d4fe97 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -144,6 +144,16 @@ states = <3300000 1 1800000 0>; }; + + clocks { + /* External PCIe bus clock - not used */ + pcie_bus_clk: pcie_bus_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "pcie_bus"; + }; + }; }; &extal_clk {