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[v3,5/8] ARM: shmobile: r8a7791: Add default PCIe bus clock

Message ID 1402652242-16604-6-git-send-email-phil.edworthy@renesas.com (mailing list archive)
State Accepted
Commit 66c405e72bf332e59ab29461e33a4e94cb8bdd7a
Headers show

Commit Message

Phil Edworthy June 13, 2014, 9:37 a.m. UTC
This patch adds a default PCIe bus clock node.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
---
v3:
 - By default, disable the PCIe bus clock

v2:
 - Use a default PCIe bus clock in the device's dtsi

 arch/arm/boot/dts/r8a7791.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

Comments

Laurent Pinchart June 13, 2014, 10:46 a.m. UTC | #1
Hi Phil,

Thank you for the patch.

On Friday 13 June 2014 10:37:19 Phil Edworthy wrote:
> This patch adds a default PCIe bus clock node.
> 
> Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>

Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> ---
> v3:
>  - By default, disable the PCIe bus clock
> 
> v2:
>  - Use a default PCIe bus clock in the device's dtsi
> 
>  arch/arm/boot/dts/r8a7791.dtsi | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
> index 1e644eb..7c4f7c7 100644
> --- a/arch/arm/boot/dts/r8a7791.dtsi
> +++ b/arch/arm/boot/dts/r8a7791.dtsi
> @@ -532,6 +532,15 @@
>  			clock-output-names = "extal";
>  		};
> 
> +		/* External PCIe clock - can be overridden by the board */
> +		pcie_bus_clk: pcie_bus_clk {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <100000000>;
> +			clock-output-names = "pcie_bus";
> +			status = "disabled";
> +		};
> +
>  		/* Special CPG clocks */
>  		cpg_clocks: cpg_clocks@e6150000 {
>  			compatible = "renesas,r8a7791-cpg-clocks",
diff mbox

Patch

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 1e644eb..7c4f7c7 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -532,6 +532,15 @@ 
 			clock-output-names = "extal";
 		};
 
+		/* External PCIe clock - can be overridden by the board */
+		pcie_bus_clk: pcie_bus_clk {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <100000000>;
+			clock-output-names = "pcie_bus";
+			status = "disabled";
+		};
+
 		/* Special CPG clocks */
 		cpg_clocks: cpg_clocks@e6150000 {
 			compatible = "renesas,r8a7791-cpg-clocks",