From patchwork Fri Sep 12 08:52:05 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulrich Hecht X-Patchwork-Id: 4892811 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 45E949F40F for ; Fri, 12 Sep 2014 08:47:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 31B4820221 for ; Fri, 12 Sep 2014 08:52:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E4DB82012E for ; Fri, 12 Sep 2014 08:52:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752555AbaILIwR (ORCPT ); Fri, 12 Sep 2014 04:52:17 -0400 Received: from mail-lb0-f173.google.com ([209.85.217.173]:62438 "EHLO mail-lb0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751282AbaILIwQ (ORCPT ); Fri, 12 Sep 2014 04:52:16 -0400 Received: by mail-lb0-f173.google.com with SMTP id w7so480850lbi.32 for ; Fri, 12 Sep 2014 01:52:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=8LmYzRJ5jyjwQ58MjvkFgPg+sUn4retUh2ct9AZ7bmc=; b=JH/0W7Vrf2F1IcmKxU6V8lgIneIzA1raEPltsFAgxtHTOn4O8d54lQUKBJwv7QQ5X5 sdEryyEVsQ957pfgp5b0CfTTuzx2cqSQufjRYk4bkRVx9pzR1FfrKbxdFG0Li6shg7N4 YNFwvMXNypIngTRnIRHRvbALQtya3PcpbXwGtoBTqPSJUexpqHPyKQAMai0ZX4rXwl7t F0w9FwMpIZ74py+qnuHDhBw/VJxLelctDZS7biBoyFwfDeclzfQNuvoz67HL7fWVGNqw N3V9v7EIHvul8lEfCufW8wOKEAWo2Vhf+/snpbCgR0k093593c+jS8gbapF/lQGqEpI2 4g6g== X-Received: by 10.112.44.129 with SMTP id e1mr6947740lbm.78.1410511934620; Fri, 12 Sep 2014 01:52:14 -0700 (PDT) Received: from groucho.site ([185.3.135.58]) by mx.google.com with ESMTPSA id oc1sm1104624lbb.45.2014.09.12.01.52.12 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 12 Sep 2014 01:52:13 -0700 (PDT) From: Ulrich Hecht To: horms@verge.net.au Cc: linux-sh@vger.kernel.org, Hisashi Nakamura , magnus.damm@gmail.com, Ulrich Hecht Subject: [PATCH v2 1/2] ARM: shmobile: rcar-gen2: Add CA7 arch_timer initialization for r8a7794 Date: Fri, 12 Sep 2014 10:52:05 +0200 Message-Id: <1410511926-9326-2-git-send-email-ulrich.hecht+renesas@gmail.com> X-Mailer: git-send-email 1.8.4.5 In-Reply-To: <1410511926-9326-1-git-send-email-ulrich.hecht+renesas@gmail.com> References: <1410511926-9326-1-git-send-email-ulrich.hecht+renesas@gmail.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-8.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SBL, RP_MATCHES_RCVD, T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On E2, the arch timer is hooked up to a different clock, and the CA7's arch timer CNTVOFF register must be initialized. Based on work by Hisashi Nakamura. Signed-off-by: Ulrich Hecht --- arch/arm/mach-shmobile/setup-rcar-gen2.c | 72 ++++++++++++++++++++++---------- 1 file changed, 49 insertions(+), 23 deletions(-) diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index 42d5b43..7ed9279 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -3,6 +3,7 @@ * * Copyright (C) 2013 Renesas Solutions Corp. * Copyright (C) 2013 Magnus Damm + * Copyright (C) 2014 Ulrich Hecht * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -24,6 +25,7 @@ #include #include #include +#include #include #include #include "common.h" @@ -54,37 +56,61 @@ void __init rcar_gen2_timer_init(void) { #if defined(CONFIG_ARM_ARCH_TIMER) || defined(CONFIG_COMMON_CLK) u32 mode = rcar_gen2_read_mode_pins(); + bool is_e2 = (bool)of_find_compatible_node(NULL, NULL, + "renesas,r8a7794"); #endif #ifdef CONFIG_ARM_ARCH_TIMER void __iomem *base; int extal_mhz = 0; u32 freq; - /* At Linux boot time the r8a7790 arch timer comes up - * with the counter disabled. Moreover, it may also report - * a potentially incorrect fixed 13 MHz frequency. To be - * correct these registers need to be updated to use the - * frequency EXTAL / 2 which can be determined by the MD pins. - */ - - switch (mode & (MD(14) | MD(13))) { - case 0: - extal_mhz = 15; - break; - case MD(13): - extal_mhz = 20; - break; - case MD(14): - extal_mhz = 26; - break; - case MD(13) | MD(14): - extal_mhz = 30; - break; + if (is_e2) { + freq = 260000000 / 8; /* ZS / 8 */ + /* CNTVOFF has to be initialized either from non-secure + * Hypervisor mode or secure Monitor mode with SCR.NS==1. + * If TrustZone is enabled then it should be handled by the + * secure code. + */ + asm volatile( + " cps 0x16\n" + " mrc p15, 0, r1, c1, c1, 0\n" + " orr r0, r1, #1\n" + " mcr p15, 0, r0, c1, c1, 0\n" + " isb\n" + " mov r0, #0\n" + " mcrr p15, 4, r0, r0, c14\n" + " isb\n" + " mcr p15, 0, r1, c1, c1, 0\n" + " isb\n" + " cps 0x13\n" + : : : "r0", "r1"); + } else { + /* At Linux boot time the r8a7790 arch timer comes up + * with the counter disabled. Moreover, it may also report + * a potentially incorrect fixed 13 MHz frequency. To be + * correct these registers need to be updated to use the + * frequency EXTAL / 2 which can be determined by the MD pins. + */ + + switch (mode & (MD(14) | MD(13))) { + case 0: + extal_mhz = 15; + break; + case MD(13): + extal_mhz = 20; + break; + case MD(14): + extal_mhz = 26; + break; + case MD(13) | MD(14): + extal_mhz = 30; + break; + } + + /* The arch timer frequency equals EXTAL / 2 */ + freq = extal_mhz * (1000000 / 2); } - /* The arch timer frequency equals EXTAL / 2 */ - freq = extal_mhz * (1000000 / 2); - /* Remap "armgcnt address map" space */ base = ioremap(0xe6080000, PAGE_SIZE);