| Message ID | 1412680220-4552-3-git-send-email-yoshihiro.shimoda.uh@renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
On 10/7/2014 3:10 PM, Yoshihiro Shimoda wrote: > Since this board doesn't have USB ID pin, we assumes the GP5_18 (USB0_PWEN) > is an ID pin because the gpio is high when the SW5 is Pin 3 side. > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > --- > arch/arm/boot/dts/r8a7790-lager.dts | 5 +++++ > 1 file changed, 5 insertions(+) > diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts > index 719979e..011254a 100644 > --- a/arch/arm/boot/dts/r8a7790-lager.dts > +++ b/arch/arm/boot/dts/r8a7790-lager.dts > @@ -446,3 +446,8 @@ > }; > }; > }; > + > +&hsusb { > + status = "okay"; > + renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>; > +}; As I said before, this is not enough. We need pinctrl-related props. Same is true for other boards. WBR, Sergei -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
(2014/10/07 20:42), Sergei Shtylyov wrote: > On 10/7/2014 3:10 PM, Yoshihiro Shimoda wrote: > >> Since this board doesn't have USB ID pin, we assumes the GP5_18 (USB0_PWEN) >> is an ID pin because the gpio is high when the SW5 is Pin 3 side. > >> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> >> --- >> arch/arm/boot/dts/r8a7790-lager.dts | 5 +++++ >> 1 file changed, 5 insertions(+) > >> diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts >> index 719979e..011254a 100644 >> --- a/arch/arm/boot/dts/r8a7790-lager.dts >> +++ b/arch/arm/boot/dts/r8a7790-lager.dts >> @@ -446,3 +446,8 @@ >> }; >> }; >> }; >> + >> +&hsusb { >> + status = "okay"; >> + renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>; >> +}; > > As I said before, this is not enough. We need pinctrl-related props. Same is true for other boards. Thank you very much for the point again. Finally I understood what you said before. I will start studying the pinctrl world. Best regards, Yoshihiro Shimoda > WBR, Sergei > -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hello. On 10/07/2014 04:19 PM, Yoshihiro Shimoda wrote: >>> Since this board doesn't have USB ID pin, we assumes the GP5_18 (USB0_PWEN) >>> is an ID pin because the gpio is high when the SW5 is Pin 3 side. >>> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> >>> --- >>> arch/arm/boot/dts/r8a7790-lager.dts | 5 +++++ >>> 1 file changed, 5 insertions(+) >>> diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts >>> index 719979e..011254a 100644 >>> --- a/arch/arm/boot/dts/r8a7790-lager.dts >>> +++ b/arch/arm/boot/dts/r8a7790-lager.dts >>> @@ -446,3 +446,8 @@ >>> }; >>> }; >>> }; >>> + >>> +&hsusb { >>> + status = "okay"; >>> + renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>; >>> +}; >> As I said before, this is not enough. We need pinctrl-related props. Same is true for other boards. > Thank you very much for the point again. > Finally I understood what you said before. > I will start studying the pinctrl world. Looks like it will be quicker if I post v3 of your patches. Unfortunately, there'll be pinctrl-related error messages in the log if the internal PCI and HS-USB drivers are enabled together but everything should still work. > Best regards, > Yoshihiro Shimoda WBR, Sergei -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index 719979e..011254a 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -446,3 +446,8 @@ }; }; }; + +&hsusb { + status = "okay"; + renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>; +};
Since this board doesn't have USB ID pin, we assumes the GP5_18 (USB0_PWEN) is an ID pin because the gpio is high when the SW5 is Pin 3 side. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> --- arch/arm/boot/dts/r8a7790-lager.dts | 5 +++++ 1 file changed, 5 insertions(+)