From patchwork Tue Oct 14 07:01:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshihiro Kaneko X-Patchwork-Id: 5078321 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D889BC11AC for ; Tue, 14 Oct 2014 07:02:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0745D20148 for ; Tue, 14 Oct 2014 07:02:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2C54220166 for ; Tue, 14 Oct 2014 07:02:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754638AbaJNHCX (ORCPT ); Tue, 14 Oct 2014 03:02:23 -0400 Received: from mail-pd0-f170.google.com ([209.85.192.170]:42930 "EHLO mail-pd0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754621AbaJNHCX (ORCPT ); Tue, 14 Oct 2014 03:02:23 -0400 Received: by mail-pd0-f170.google.com with SMTP id p10so7066380pdj.1 for ; Tue, 14 Oct 2014 00:02:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jHBW+6Q90NtsU+0Ked57XNnKB85xjMLC3+DFMASufqA=; b=xs0fgEKK81SESkJ5G8+ch6R8ffbgCi29450BcAlFMl0x7MhyUvvsR8eI+w3uCCfwjH UX5tj7Vo9f3u+Uw+4tJ3ufmDuwrqIe6X4Xvc6Vqm2hDCKy/ITNCs7bkBfQJYiSYht2Je yh/VoROYl/voGC+nSIUA2Q2Lk6PsO17rRuzUkgPZBXDYekemHphikyvoQV6JTH/b3AaT /soICyUyP1K0N34AVbrIaqiJ2SjIXbeM1n4FO/JxBcyzq6otnG0k0W/6Ph112xxxfYNn fmpLQJuTu0P2zNDmx9FrMmX9/iSCBcjNZziIDuaKk1xtqOrk47wPRRcqRP3F5TBWja8L Ctcw== X-Received: by 10.70.10.33 with SMTP id f1mr3431702pdb.1.1413270143123; Tue, 14 Oct 2014 00:02:23 -0700 (PDT) Received: from localhost.localdomain (p5095-ipngn6701marunouchi.tokyo.ocn.ne.jp. [153.174.4.95]) by mx.google.com with ESMTPSA id p1sm13092673pds.80.2014.10.14.00.02.21 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 14 Oct 2014 00:02:22 -0700 (PDT) From: Yoshihiro Kaneko To: linux-sh@vger.kernel.org Cc: Simon Horman , Magnus Damm , linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/4] ARM: shmobile: r8a7791: Add SGX clock to device tree Date: Tue, 14 Oct 2014 16:01:41 +0900 Message-Id: <1413270103-9517-3-git-send-email-ykaneko0929@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1413270103-9517-1-git-send-email-ykaneko0929@gmail.com> References: <1413270103-9517-1-git-send-email-ykaneko0929@gmail.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kouei Abe Signed-off-by: Kouei Abe Signed-off-by: Yoshihiro Kaneko --- arch/arm/boot/dts/r8a7791.dtsi | 11 ++++++----- include/dt-bindings/clock/r8a7791-clock.h | 1 + 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index d343099..5a26c1a 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1,7 +1,7 @@ /* * Device Tree Source for the r8a7791 SoC * - * Copyright (C) 2013 Renesas Electronics Corporation + * Copyright (C) 2013-2014 Renesas Electronics Corporation * Copyright (C) 2013-2014 Renesas Solutions Corp. * Copyright (C) 2014 Cogent Embedded Inc. * @@ -947,17 +947,18 @@ mstp1_clks: mstp1_clks@e6150134 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; - clocks = <&m2_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, + clocks = <&m2_clk>, <&p_clk>, <&zg_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>; #clock-cells = <1>; renesas,clock-indices = < - R8A7791_CLK_JPU R8A7791_CLK_TMU1 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2 + R8A7791_CLK_JPU R8A7791_CLK_TMU1 R8A7791_CLK_3DG + R8A7791_CLK_TMU3 R8A7791_CLK_TMU2 R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1 R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_S >; clock-output-names = - "jpu", "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1", - "vsp1-du0", "vsp1-sy"; + "jpu", "tmu1", "3dg", "tmu3", "tmu2", "cmt0", "tmu0", + "vsp1-du1", "vsp1-du0", "vsp1-sy"; }; mstp2_clks: mstp2_clks@e6150138 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index 58c3f49..9570b7c 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h @@ -27,6 +27,7 @@ /* MSTP1 */ #define R8A7791_CLK_JPU 6 #define R8A7791_CLK_TMU1 11 +#define R8A7791_CLK_3DG 12 #define R8A7791_CLK_TMU3 21 #define R8A7791_CLK_TMU2 22 #define R8A7791_CLK_CMT0 24