@@ -65,6 +65,20 @@
};
&bsc {
+ fpga@18200000 {
+ compatible = "pinctrl-single";
+ reg = <0x18200030 2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-single,bit-per-mux;
+ pinctrl-single,register-width = <16>;
+ pinctrl-single,function-mask = <1>;
+
+ irq_pins: fpga_irq_pins {
+ pinctrl-single,bits = <0 0 0x10>;
+ };
+ };
+
ethernet@18300000 {
compatible = "smsc,lan9220", "smsc,lan9115";
reg = <0x18300000 0x1000>;
@@ -75,6 +89,9 @@
reg-io-width = <4>;
vddvario-supply = <&fixedregulator3v3>;
vdd33a-supply = <&fixedregulator3v3>;
+
+ pinctrl-0 = <&irq_pins>;
+ pinctrl-names = "default";
};
};
Clears bit 4 in IRQMR0 in the FPGA to enable the SMSC interrupt. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> --- arch/arm/boot/dts/r8a7778-bockw.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)