From patchwork Fri Aug 21 18:02:45 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 7053221 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 61C9B9F344 for ; Fri, 21 Aug 2015 18:03:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6C97C203B0 for ; Fri, 21 Aug 2015 18:03:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7AEBB203AA for ; Fri, 21 Aug 2015 18:03:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752504AbbHUSDh (ORCPT ); Fri, 21 Aug 2015 14:03:37 -0400 Received: from andre.telenet-ops.be ([195.130.132.53]:51283 "EHLO andre.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752467AbbHUSDZ (ORCPT ); Fri, 21 Aug 2015 14:03:25 -0400 Received: from ayla.of.borg ([84.193.93.87]) by andre.telenet-ops.be with bizsmtp id 7W3J1r00F1t5w8s01W3JdJ; Fri, 21 Aug 2015 20:03:22 +0200 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.82) (envelope-from ) id 1ZSqer-0007oZ-RG; Fri, 21 Aug 2015 20:03:17 +0200 Received: from geert by ramsan with local (Exim 4.82) (envelope-from ) id 1ZSqet-0001qc-La; Fri, 21 Aug 2015 20:03:19 +0200 From: Geert Uytterhoeven To: Greg Kroah-Hartman , Jiri Slaby Cc: Magnus Damm , Yoshihiro Shimoda , Laurent Pinchart , Nobuhiro Iwamatsu , Yoshihiro Kaneko , Kazuya Mizuguchi , Koji Matsuoka , Wolfram Sang , Guennadi Liakhovetski , linux-serial@vger.kernel.org, linux-sh@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v3 21/33] serial: sh-sci: Switch to generic DMA residue handling Date: Fri, 21 Aug 2015 20:02:45 +0200 Message-Id: <1440180177-6924-22-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1440180177-6924-1-git-send-email-geert+renesas@glider.be> References: <1440180177-6924-1-git-send-email-geert+renesas@glider.be> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Convert the SCI driver from the SHDMAE-specific partial DMA transfer handling to the generic dmaengine residual data framework. Signed-off-by: Geert Uytterhoeven --- v3: - Use "%u" to format "unsigned int", v2: - New. --- drivers/tty/serial/Kconfig | 2 +- drivers/tty/serial/sh-sci.c | 16 +++++++++------- 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index ed299b9e63752b4e..e9abde75179d3c1a 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -743,7 +743,7 @@ config SERIAL_SH_SCI_CONSOLE config SERIAL_SH_SCI_DMA bool "DMA support" - depends on SERIAL_SH_SCI && SH_DMAE + depends on SERIAL_SH_SCI && DMA_ENGINE config SERIAL_PNX8XXX bool "Enable PNX8XXX SoCs' UART Support" diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 294b283f5c8535c3..049036dfb6ddf32c 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -1438,6 +1438,8 @@ static void work_fn_rx(struct work_struct *work) struct sci_port *s = container_of(work, struct sci_port, work_rx); struct uart_port *port = &s->port; struct dma_async_tx_descriptor *desc; + struct dma_tx_state state; + enum dma_status status; int new; if (s->active_rx == s->cookie_rx[0]) { @@ -1451,21 +1453,21 @@ static void work_fn_rx(struct work_struct *work) } desc = s->desc_rx[new]; - if (dma_async_is_tx_complete(s->chan_rx, s->active_rx, NULL, NULL) != - DMA_COMPLETE) { + status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state); + if (status != DMA_COMPLETE) { /* Handle incomplete DMA receive */ struct dma_chan *chan = s->chan_rx; - struct shdma_desc *sh_desc = container_of(desc, - struct shdma_desc, async_tx); unsigned long flags; + unsigned int read; int count; dmaengine_terminate_all(chan); - dev_dbg(port->dev, "Read %zu bytes with cookie %d\n", - sh_desc->partial, sh_desc->cookie); + read = sg_dma_len(&s->sg_rx[new]) - state.residue; + dev_dbg(port->dev, "Read %u bytes with cookie %d\n", read, + s->active_rx); spin_lock_irqsave(&port->lock, flags); - count = sci_dma_rx_push(s, sh_desc->partial); + count = sci_dma_rx_push(s, read); spin_unlock_irqrestore(&port->lock, flags); if (count)