From patchwork Wed Aug 26 18:13:50 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 7079171 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B4A189F372 for ; Wed, 26 Aug 2015 18:14:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C194F20949 for ; Wed, 26 Aug 2015 18:14:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C4DB420948 for ; Wed, 26 Aug 2015 18:13:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751988AbbHZSN6 (ORCPT ); Wed, 26 Aug 2015 14:13:58 -0400 Received: from michel.telenet-ops.be ([195.130.137.88]:57360 "EHLO michel.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752809AbbHZSNz (ORCPT ); Wed, 26 Aug 2015 14:13:55 -0400 Received: from ayla.of.borg ([31.5.182.137]) by michel.telenet-ops.be with bizsmtp id 9WDt1r00p2yGKqv06WDtuS; Wed, 26 Aug 2015 20:13:53 +0200 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.82) (envelope-from ) id 1ZUfCr-0004Ht-Da; Wed, 26 Aug 2015 20:13:53 +0200 Received: from geert by ramsan with local (Exim 4.82) (envelope-from ) id 1ZUfCt-0004bM-Um; Wed, 26 Aug 2015 20:13:55 +0200 From: Geert Uytterhoeven To: Kuninori Morimoto , Simon Horman , Magnus Damm Cc: linux-sh@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 4/6] arm64: renesas: r8a7795 dtsi: Add all HSCIF nodes Date: Wed, 26 Aug 2015 20:13:50 +0200 Message-Id: <1440612832-17627-5-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1440612832-17627-1-git-send-email-geert+renesas@glider.be> References: <1440612832-17627-1-git-send-email-geert+renesas@glider.be> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the device nodes for all HSCIF serial ports, incl. clocks, clock domain, and dma properties. Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 82 +++++++++++++++++++++++++++++++ include/dt-bindings/clock/r8a7795-clock.h | 5 ++ 2 files changed, 87 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 54cc67ef37c650ca..54f2a2b0e1158335 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -277,6 +277,28 @@ clock-output-names = "scif2"; }; + mstp5_clks: mstp5_clks@e6150144 { + compatible = + "renesas,r8a7795-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150144 0 4>, + <0 0xe615003c 0 4>; + clocks = <&s3d1_clk>, <&s3d1_clk>, + <&s3d1_clk>, <&s3d1_clk>, + <&s3d1_clk>; + #clock-cells = <1>; + renesas,clock-indices = < + R8A7795_CLK_HSCIF4 + R8A7795_CLK_HSCIF3 + R8A7795_CLK_HSCIF2 + R8A7795_CLK_HSCIF1 + R8A7795_CLK_HSCIF0 + >; + clock-output-names = + "hscif4", "hscif3", "hscif2", + "hscif1", "hscif0"; + }; + mstp7_clks: mstp7_clks@e615014c { compatible = "renesas,r8a7795-mstp-clocks", "renesas,cpg-mstp-clocks"; @@ -380,6 +402,66 @@ status = "disabled"; }; + hscif0: serial@e6540000 { + compatible = "renesas,hscif-r8a7795", "renesas,hscif"; + reg = <0 0xe6540000 0 96>; + interrupts = ; + clocks = <&mstp5_clks R8A7795_CLK_HSCIF0>; + clock-names = "sci_ick"; + dmas = <&dmac1 0x31>, <&dmac1 0x30>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + hscif1: serial@e6550000 { + compatible = "renesas,hscif-r8a7795", "renesas,hscif"; + reg = <0 0xe6550000 0 96>; + interrupts = ; + clocks = <&mstp5_clks R8A7795_CLK_HSCIF1>; + clock-names = "sci_ick"; + dmas = <&dmac1 0x33>, <&dmac1 0x32>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + hscif2: serial@e6560000 { + compatible = "renesas,hscif-r8a7795", "renesas,hscif"; + reg = <0 0xe6560000 0 96>; + interrupts = ; + clocks = <&mstp5_clks R8A7795_CLK_HSCIF2>; + clock-names = "sci_ick"; + dmas = <&dmac1 0x35>, <&dmac1 0x34>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + hscif3: serial@e66a0000 { + compatible = "renesas,hscif-r8a7795", "renesas,hscif"; + reg = <0 0xe66a0000 0 96>; + interrupts = ; + clocks = <&mstp5_clks R8A7795_CLK_HSCIF3>; + clock-names = "sci_ick"; + dmas = <&dmac0 0x37>, <&dmac0 0x36>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + hscif4: serial@e66b0000 { + compatible = "renesas,hscif-r8a7795", "renesas,hscif"; + reg = <0 0xe66b0000 0 96>; + interrupts = ; + clocks = <&mstp5_clks R8A7795_CLK_HSCIF4>; + clock-names = "sci_ick"; + dmas = <&dmac0 0x39>, <&dmac0 0x38>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + usb2_phy0: usb-phy@ee080200 { compatible = "renesas,usb2-phy-r8a7795"; reg = <0 0xee080200 0 0x6ff>, <0 0xe6590100 0 0x100>; diff --git a/include/dt-bindings/clock/r8a7795-clock.h b/include/dt-bindings/clock/r8a7795-clock.h index baf884dad15eaf73..2b8c375eebb6a9d9 100644 --- a/include/dt-bindings/clock/r8a7795-clock.h +++ b/include/dt-bindings/clock/r8a7795-clock.h @@ -32,6 +32,11 @@ #define R8A7795_CLK_SCIF2 10 /* MSTP5 */ +#define R8A7795_CLK_HSCIF4 16 +#define R8A7795_CLK_HSCIF3 17 +#define R8A7795_CLK_HSCIF2 18 +#define R8A7795_CLK_HSCIF1 19 +#define R8A7795_CLK_HSCIF0 20 /* MSTP7 */ #define R8A7795_CLK_HSUSB 4