From patchwork Wed Sep 30 06:16:23 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 7292851 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id E54229FC02 for ; Wed, 30 Sep 2015 06:16:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1B5F920592 for ; Wed, 30 Sep 2015 06:16:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DD3F52064F for ; Wed, 30 Sep 2015 06:16:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753795AbbI3GQh (ORCPT ); Wed, 30 Sep 2015 02:16:37 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:59128 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753786AbbI3GQh (ORCPT ); Wed, 30 Sep 2015 02:16:37 -0400 Received: from reginn.isobedori.kobe.vergenet.net (p4119-ipbfp1002kobeminato.hyogo.ocn.ne.jp [122.22.70.119]) by kirsty.vergenet.net (Postfix) with ESMTPA id 5716025C19D; Wed, 30 Sep 2015 16:16:34 +1000 (AEST) Received: by reginn.isobedori.kobe.vergenet.net (Postfix, from userid 7100) id 549E6940220; Wed, 30 Sep 2015 15:16:36 +0900 (JST) From: Simon Horman To: linux-sh@vger.kernel.org Cc: Geert Uytterhoeven , Magnus Damm Subject: [PATCH 1/5] arm64: dts: r8a7795: add clock for EthernetAVB Date: Wed, 30 Sep 2015 15:16:23 +0900 Message-Id: <1443593787-21224-2-git-send-email-horms+renesas@verge.net.au> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1443593787-21224-1-git-send-email-horms+renesas@verge.net.au> References: <1443593787-21224-1-git-send-email-horms+renesas@verge.net.au> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kazuya Mizuguchi These clocks will be used by EthernetAVB Signed-off-by: Kazuya Mizuguchi [horms: use s3d2_clk; other minor updates] Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- v0 [Kazuya Mizuguchi] v1 [Simon Horman] * updated p_clk to s3d4_clk * moved to clock node * updated patch subject * use R8A7795 as prefix for clock defines v2 [Simon Horman] * As suggested by Geert Uytterhoeven - Use s3d2_clk use it instead: it is now already present in the base of this series - Use R8A7795_CLK_ETHERAVB instead of R8A7795_CLK_AVB * As suggested by Kuninori Morimoto and Sergei Shtylyov - Use "clock-indices" instead of "renesas,clock-indices" v3 [Simon Horman] * As suggested by Geert Uytterhoeven - Name clock "etheravb" * Add Ack v4 * No change --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 12 ++++++++++++ include/dt-bindings/clock/r8a7795-clock.h | 1 + 2 files changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index d7e70f57d165..60d64c51b510 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -274,6 +274,17 @@ #clock-cells = <1>; clock-indices = ; }; + + mstp8_clks: mstp8_clks@e6150990 { + compatible = "renesas,r8a7795-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; + clocks = <&s3d2_clk>; + #clock-cells = <1>; + clock-indices = ; + clock-output-names = "etheravb"; + }; + }; }; @@ -364,4 +375,5 @@ status = "disabled"; }; }; + }; diff --git a/include/dt-bindings/clock/r8a7795-clock.h b/include/dt-bindings/clock/r8a7795-clock.h index d661602cb164..fd2514b5d7cc 100644 --- a/include/dt-bindings/clock/r8a7795-clock.h +++ b/include/dt-bindings/clock/r8a7795-clock.h @@ -36,6 +36,7 @@ /* MSTP7 */ /* MSTP8 */ +#define R8A7795_CLK_ETHERAVB 12 /* MSTP9 */