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[90.63.143.228]) by smtp.gmail.com with ESMTPSA id gw8sm50686wib.15.2015.10.12.10.41.36 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 12 Oct 2015 10:41:38 -0700 (PDT) From: ahaslam@baylibre.com To: magnus.damm@gmail.com, horms@verge.net.au, geert@glider.be Cc: bcousson@baylibre.com, linux-sh@vger.kernel.org, Axel Haslam Subject: [RFC/RFT 5/6] ARM: dts: add CCI node for r8a7790 Date: Mon, 12 Oct 2015 19:41:13 +0200 Message-Id: <1444671674-19275-6-git-send-email-ahaslam@baylibre.com> X-Mailer: git-send-email 2.4.5 In-Reply-To: <1444671674-19275-1-git-send-email-ahaslam@baylibre.com> References: <1444671674-19275-1-git-send-email-ahaslam@baylibre.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Axel Haslam Add device-tree bindings for the ARM CCI-400 on r8a7790. There are two slave interfaces: one for the A15 cluster and one for the A7 cluster. (inspired on exynos5420.dtsi) Signed-off-by: Axel Haslam --- arch/arm/boot/dts/r8a7790.dtsi | 29 ++++++++++++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 91b0eb0..e7c3c6a 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -52,7 +52,7 @@ voltage-tolerance = <1>; /* 1% */ clocks = <&cpg_clocks R8A7790_CLK_Z>; clock-latency = <300000>; /* 300 us */ - + cci-control-port = <&cci_control1>; /* kHz - uV - OPPs unknown yet */ operating-points = <1400000 1000000>, <1225000 1000000>, @@ -67,6 +67,7 @@ compatible = "arm,cortex-a15"; reg = <1>; clock-frequency = <1300000000>; + cci-control-port = <&cci_control1>; }; cpu2: cpu@2 { @@ -74,6 +75,7 @@ compatible = "arm,cortex-a15"; reg = <2>; clock-frequency = <1300000000>; + cci-control-port = <&cci_control1>; }; cpu3: cpu@3 { @@ -81,6 +83,7 @@ compatible = "arm,cortex-a15"; reg = <3>; clock-frequency = <1300000000>; + cci-control-port = <&cci_control1>; }; cpu4: cpu@4 { @@ -88,6 +91,7 @@ compatible = "arm,cortex-a7"; reg = <0x100>; clock-frequency = <780000000>; + cci-control-port = <&cci_control2>; }; cpu5: cpu@5 { @@ -95,6 +99,7 @@ compatible = "arm,cortex-a7"; reg = <0x101>; clock-frequency = <780000000>; + cci-control-port = <&cci_control2>; }; cpu6: cpu@6 { @@ -102,6 +107,7 @@ compatible = "arm,cortex-a7"; reg = <0x102>; clock-frequency = <780000000>; + cci-control-port = <&cci_control2>; }; cpu7: cpu@7 { @@ -109,6 +115,7 @@ compatible = "arm,cortex-a7"; reg = <0x103>; clock-frequency = <780000000>; + cci-control-port = <&cci_control2>; }; }; @@ -124,6 +131,26 @@ interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; + cci@f0090000 { + compatible = "arm,cci-400"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0 0xf0090000 0 0x1000>; + ranges = <0x0 0x0 0xf0090000 0x10000>; + + cci_control1: slave-if@4000 { + compatible = "arm,cci-400-ctrl-if"; + interface-type = "ace"; + reg = <0x4000 0x1000>; + }; + + cci_control2: slave-if@5000 { + compatible = "arm,cci-400-ctrl-if"; + interface-type = "ace"; + reg = <0x5000 0x1000>; + }; + }; + gpio0: gpio@e6050000 { compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; reg = <0 0xe6050000 0 0x50>;