@@ -28,7 +28,18 @@
#include "common.h"
#include "rcar-gen2.h"
-#define MODEMR 0xe6160060
+#define WDTRSTCR 0xe6160054
+#define MODEMR 0xe6160060
+
+void __init rcar_gen2_wdt_rst_init(void)
+{
+#if defined(CONFIG_WATCHDOG)
+ void __iomem *p = ioremap_nocache(WDTRSTCR, 4);
+ BUG_ON(!p);
+ iowrite32(0xa55a0000, p);
+ iounmap(p);
+#endif
+}
u32 rcar_gen2_read_mode_pins(void)
{
@@ -129,6 +140,9 @@ void __init rcar_gen2_timer_init(void)
rcar_gen2_clocks_init(mode);
clocksource_probe();
+
+ /* allow watchdog timers to trigger reset */
+ rcar_gen2_wdt_rst_init();
}
struct memory_reserve_config {