diff mbox

[2/2] ARM: shmobile: gose: Configure PFC in DT

Message ID 1447032799-13155-3-git-send-email-horms+renesas@verge.net.au (mailing list archive)
State Accepted
Commit a81f05089aad81607bb4bcf9ccfb41ef4814d95e
Headers show

Commit Message

Simon Horman Nov. 9, 2015, 1:33 a.m. UTC
Configure PFC for the already enabled scif and ethernet devices
in the device tree for the gose board.

Based on similar work for the koelsch board by Laurent Pinchart and
Sergei Shtylyov.

Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/boot/dts/r8a7793-gose.dts | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

Comments

Laurent Pinchart Nov. 9, 2015, 2:16 p.m. UTC | #1
Hi Simon,

On Monday 09 November 2015 10:33:19 Simon Horman wrote:
> Configure PFC for the already enabled scif and ethernet devices
> in the device tree for the gose board.
> 
> Based on similar work for the koelsch board by Laurent Pinchart and
> Sergei Shtylyov.

I can't really comment on the patch due to lack of a schematics for the Goose 
board, but it looks good to me in principle.

Acked-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

> Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> ---
>  arch/arm/boot/dts/r8a7793-gose.dts | 31 +++++++++++++++++++++++++++++++
>  1 file changed, 31 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/r8a7793-gose.dts
> b/arch/arm/boot/dts/r8a7793-gose.dts index 96443ec5f6ab..1575ef759047
> 100644
> --- a/arch/arm/boot/dts/r8a7793-gose.dts
> +++ b/arch/arm/boot/dts/r8a7793-gose.dts
> @@ -37,7 +37,32 @@
>  	clock-frequency = <20000000>;
>  };
> 
> +&pfc {
> +	scif0_pins: serial0 {
> +		renesas,groups = "scif0_data_d";
> +		renesas,function = "scif0";
> +	};
> +
> +	scif1_pins: serial1 {
> +		renesas,groups = "scif1_data_d";
> +		renesas,function = "scif1";
> +	};
> +
> +	ether_pins: ether {
> +		renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
> +		renesas,function = "eth";
> +	};
> +
> +	phy1_pins: phy1 {
> +		renesas,groups = "intc_irq0";
> +		renesas,function = "intc";
> +	};
> +};
> +
>  &ether {
> +	pinctrl-0 = <&ether_pins &phy1_pins>;
> +	pinctrl-names = "default";
> +
>  	phy-handle = <&phy1>;
>  	renesas,ether-link-active-low;
>  	status = "okay";
> @@ -55,9 +80,15 @@
>  };
> 
>  &scif0 {
> +	pinctrl-0 = <&scif0_pins>;
> +	pinctrl-names = "default";
> +
>  	status = "okay";
>  };
> 
>  &scif1 {
> +	pinctrl-0 = <&scif1_pins>;
> +	pinctrl-names = "default";
> +
>  	status = "okay";
>  };
Simon Horman Nov. 10, 2015, 12:13 a.m. UTC | #2
On Mon, Nov 09, 2015 at 04:16:45PM +0200, Laurent Pinchart wrote:
> Hi Simon,
> 
> On Monday 09 November 2015 10:33:19 Simon Horman wrote:
> > Configure PFC for the already enabled scif and ethernet devices
> > in the device tree for the gose board.
> > 
> > Based on similar work for the koelsch board by Laurent Pinchart and
> > Sergei Shtylyov.
> 
> I can't really comment on the patch due to lack of a schematics for the Goose 
> board, but it looks good to me in principle.
> 
> Acked-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Thanks, I have queued up both patches of this series.
--
To unsubscribe from this list: send the line "unsubscribe linux-sh" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff mbox

Patch

diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts
index 96443ec5f6ab..1575ef759047 100644
--- a/arch/arm/boot/dts/r8a7793-gose.dts
+++ b/arch/arm/boot/dts/r8a7793-gose.dts
@@ -37,7 +37,32 @@ 
 	clock-frequency = <20000000>;
 };
 
+&pfc {
+	scif0_pins: serial0 {
+		renesas,groups = "scif0_data_d";
+		renesas,function = "scif0";
+	};
+
+	scif1_pins: serial1 {
+		renesas,groups = "scif1_data_d";
+		renesas,function = "scif1";
+	};
+
+	ether_pins: ether {
+		renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
+		renesas,function = "eth";
+	};
+
+	phy1_pins: phy1 {
+		renesas,groups = "intc_irq0";
+		renesas,function = "intc";
+	};
+};
+
 &ether {
+	pinctrl-0 = <&ether_pins &phy1_pins>;
+	pinctrl-names = "default";
+
 	phy-handle = <&phy1>;
 	renesas,ether-link-active-low;
 	status = "okay";
@@ -55,9 +80,15 @@ 
 };
 
 &scif0 {
+	pinctrl-0 = <&scif0_pins>;
+	pinctrl-names = "default";
+
 	status = "okay";
 };
 
 &scif1 {
+	pinctrl-0 = <&scif1_pins>;
+	pinctrl-names = "default";
+
 	status = "okay";
 };