| Message ID | 1449802376-11301-6-git-send-email-horms+renesas@verge.net.au (mailing list archive) |
|---|---|
| State | RFC |
| Delegated to: | Simon Horman |
| Headers | show |
Hi Simon > Instantiate MSTP10 clocks in r8a7793 device tree. > > Based on similar work for the r8a7791 by Kuninori Morimoto. > > Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> > --- (snip) > + mstp10_clks: mstp10_clks@e6150998 { > + compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; > + reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; I wonder does r8a7793 use mstp driver ? not mssr ? Because RFC ? Best regards --- Kuninori Morimoto -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, Dec 14, 2015 at 01:00:59AM +0000, Kuninori Morimoto wrote: > > Hi Simon > > > Instantiate MSTP10 clocks in r8a7793 device tree. > > > > Based on similar work for the r8a7791 by Kuninori Morimoto. > > > > Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> > > --- > (snip) > > + mstp10_clks: mstp10_clks@e6150998 { > > + compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; > > + reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; > > I wonder does r8a7793 use mstp driver ? not mssr ? > Because RFC ? My main motivation is that it follow the pattern already used for other clocks in the same file. I believe all the Renesas ARM32 DTS/DTSI files are currently using mssr. Perhaps we should come up with a plan to migrate some or all of them to mstp. -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Simon > > > + mstp10_clks: mstp10_clks@e6150998 { > > > + compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; > > > + reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; > > > > I wonder does r8a7793 use mstp driver ? not mssr ? > > Because RFC ? > > My main motivation is that it follow the pattern already used > for other clocks in the same file. I believe all the Renesas ARM32 > DTS/DTSI files are currently using mssr. Perhaps we should > come up with a plan to migrate some or all of them to mstp. Thanks. and sorry, I misunderstood about r8a7793 <-> mssr/mstp -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, Dec 14, 2015 at 2:47 AM, Simon Horman <horms@verge.net.au> wrote: > On Mon, Dec 14, 2015 at 01:00:59AM +0000, Kuninori Morimoto wrote: >> >> Hi Simon >> >> > Instantiate MSTP10 clocks in r8a7793 device tree. >> > >> > Based on similar work for the r8a7791 by Kuninori Morimoto. >> > >> > Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> >> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> >> > --- >> (snip) >> > + mstp10_clks: mstp10_clks@e6150998 { >> > + compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; >> > + reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; >> >> I wonder does r8a7793 use mstp driver ? not mssr ? >> Because RFC ? > > My main motivation is that it follow the pattern already used > for other clocks in the same file. I believe all the Renesas ARM32 > DTS/DTSI files are currently using mssr. Perhaps we should > come up with a plan to migrate some or all of them to mstp. (it's the other way around ;-) ... plan to migrate some or all of from MSTP to MSSR. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index cdf40abcc36c..5f953c594395 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -955,6 +955,42 @@ "qspi_mod", "i2c5", "iic3", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0"; }; + mstp10_clks: mstp10_clks@e6150998 { + compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; + clocks = <&p_clk>, + <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, + <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, + <&p_clk>, + <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>, + <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>, + <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>, + <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>, + <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>, + <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>, + <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>; + + #clock-cells = <1>; + clock-indices = < + R8A7793_CLK_SSI_ALL + R8A7793_CLK_SSI9 R8A7793_CLK_SSI8 R8A7793_CLK_SSI7 R8A7793_CLK_SSI6 R8A7793_CLK_SSI5 + R8A7793_CLK_SSI4 R8A7793_CLK_SSI3 R8A7793_CLK_SSI2 R8A7793_CLK_SSI1 R8A7793_CLK_SSI0 + R8A7793_CLK_SCU_ALL + R8A7793_CLK_SCU_DVC1 R8A7793_CLK_SCU_DVC0 + R8A7793_CLK_SCU_CTU1_MIX1 R8A7793_CLK_SCU_CTU0_MIX0 + R8A7793_CLK_SCU_SRC9 R8A7793_CLK_SCU_SRC8 R8A7793_CLK_SCU_SRC7 R8A7793_CLK_SCU_SRC6 R8A7793_CLK_SCU_SRC5 + R8A7793_CLK_SCU_SRC4 R8A7793_CLK_SCU_SRC3 R8A7793_CLK_SCU_SRC2 R8A7793_CLK_SCU_SRC1 R8A7793_CLK_SCU_SRC0 + >; + clock-output-names = + "ssi-all", + "ssi9", "ssi8", "ssi7", "ssi6", "ssi5", + "ssi4", "ssi3", "ssi2", "ssi1", "ssi0", + "scu-all", + "scu-dvc1", "scu-dvc0", + "scu-ctu1-mix1", "scu-ctu0-mix0", + "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5", + "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0"; + }; mstp11_clks: mstp11_clks@e615099c { compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>; diff --git a/include/dt-bindings/clock/r8a7793-clock.h b/include/dt-bindings/clock/r8a7793-clock.h index 1579e07f96a3..efcbc594fe82 100644 --- a/include/dt-bindings/clock/r8a7793-clock.h +++ b/include/dt-bindings/clock/r8a7793-clock.h @@ -145,6 +145,8 @@ #define R8A7793_CLK_SCU_ALL 17 #define R8A7793_CLK_SCU_DVC1 18 #define R8A7793_CLK_SCU_DVC0 19 +#define R8A7793_CLK_SCU_CTU1_MIX1 20 +#define R8A7793_CLK_SCU_CTU0_MIX0 21 #define R8A7793_CLK_SCU_SRC9 22 #define R8A7793_CLK_SCU_SRC8 23 #define R8A7793_CLK_SCU_SRC7 24
Instantiate MSTP10 clocks in r8a7793 device tree. Based on similar work for the r8a7791 by Kuninori Morimoto. Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- arch/arm/boot/dts/r8a7793.dtsi | 36 +++++++++++++++++++++++++++++++ include/dt-bindings/clock/r8a7793-clock.h | 2 ++ 2 files changed, 38 insertions(+)