From patchwork Thu Dec 24 10:09:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dirk Behme X-Patchwork-Id: 7916331 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 39653BEEE5 for ; Thu, 24 Dec 2015 10:09:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 372F42052D for ; Thu, 24 Dec 2015 10:09:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 590362050B for ; Thu, 24 Dec 2015 10:09:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755399AbbLXKJa (ORCPT ); Thu, 24 Dec 2015 05:09:30 -0500 Received: from mail-wm0-f54.google.com ([74.125.82.54]:36164 "EHLO mail-wm0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755352AbbLXKJ3 (ORCPT ); Thu, 24 Dec 2015 05:09:29 -0500 Received: by mail-wm0-f54.google.com with SMTP id p187so175223781wmp.1 for ; Thu, 24 Dec 2015 02:09:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=qQW2SdePnnkG0g5cM/rTeNS9Id8KZ8lNAjcqL5nyFr4=; b=AS2KqkBNP1iE8XzPBbYJwIN4VGjcIVSYEN3wtxHwyZdhIWYXvlbWZCX9lwn/rYrLf4 CV/IWN5MN94w0byIXrhbIIMkvAmzf+N3rLGiC8BFMIMyTbVQ3CC2hOMu8kxyOhznaJ8L ZmdrHUqDGGn0heihRxZgAXvwXp/WMHF496fNJ/IvpZ7FuRioVu7pnhLiWHzD2PfeTJQw j1T/sMD3JZcsStO6AVbzYQ59vYpzQdLhEHnXmI2p8P3kvYvsHh0+hmxlmugu+uzDtQoI +ZFxv3xLSVTgLxIh9RyPud2J5fSNxBzaqMc+OWdw4JxBnOasJCeKx8u7FNMv6YVNDbXl qdyw== X-Received: by 10.194.174.73 with SMTP id bq9mr39748014wjc.115.1450951766478; Thu, 24 Dec 2015 02:09:26 -0800 (PST) Received: from localhost.localdomain (p4FEE2C06.dip0.t-ipconnect.de. [79.238.44.6]) by smtp.gmail.com with ESMTPSA id w203sm32776532wmg.15.2015.12.24.02.09.25 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 24 Dec 2015 02:09:25 -0800 (PST) From: Dirk Behme To: linux-sh@vger.kernel.org, geert+renesas@glider.be, horms+renesas@verge.net.au Cc: Dirk Behme Subject: [PATCH v2] clk: shmobile: r8a7795: Add SDHI clocks Date: Thu, 24 Dec 2015 11:09:21 +0100 Message-Id: <1450951761-3160-1-git-send-email-dirk.behme@gmail.com> X-Mailer: git-send-email 2.6.4 Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add R8A7795 SDHI clocks. Signed-off-by: Dirk Behme --- Changes in v2: Add the missing *H clocks and correct the dividers. This replaces v1 http://www.spinics.net/lists/linux-sh/msg47464.html drivers/clk/shmobile/r8a7795-cpg-mssr.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/clk/shmobile/r8a7795-cpg-mssr.c b/drivers/clk/shmobile/r8a7795-cpg-mssr.c index 05479e6..f30ed32 100644 --- a/drivers/clk/shmobile/r8a7795-cpg-mssr.c +++ b/drivers/clk/shmobile/r8a7795-cpg-mssr.c @@ -100,8 +100,15 @@ static const struct cpg_core_clk r8a7795_core_clks[] __initconst = { DEF_FIXED("s3d2", R8A7795_CLK_S3D2, CLK_S3, 2, 1), DEF_FIXED("s3d4", R8A7795_CLK_S3D4, CLK_S3, 4, 1), DEF_FIXED("cl", R8A7795_CLK_CL, CLK_PLL1_DIV2, 48, 1), + DEF_FIXED("sd0h", R8A7795_CLK_SD0H, CLK_PLL1_DIV2, 2, 1), + DEF_FIXED("sd0", R8A7795_CLK_SD0, CLK_PLL1_DIV2, 8, 1), + DEF_FIXED("sd1h", R8A7795_CLK_SD1H, CLK_PLL1_DIV2, 2, 1), + DEF_FIXED("sd1", R8A7795_CLK_SD1, CLK_PLL1_DIV2, 8, 1), + DEF_FIXED("sd2h", R8A7795_CLK_SD2H, CLK_PLL1_DIV2, 2, 1), + DEF_FIXED("sd2", R8A7795_CLK_SD2, CLK_PLL1_DIV2, 8, 1), + DEF_FIXED("sd3h", R8A7795_CLK_SD3H, CLK_PLL1_DIV2, 2, 1), + DEF_FIXED("sd3", R8A7795_CLK_SD3, CLK_PLL1_DIV2, 8, 1), DEF_FIXED("cp", R8A7795_CLK_CP, CLK_EXTAL, 2, 1), - DEF_DIV6P1("mso", R8A7795_CLK_MSO, CLK_PLL1_DIV4, 0x014), DEF_DIV6P1("hdmi", R8A7795_CLK_HDMI, CLK_PLL1_DIV2, 0x250), }; @@ -120,6 +127,10 @@ static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = { DEF_MOD("sys-dmac1", 218, R8A7795_CLK_S3D1), DEF_MOD("sys-dmac0", 219, R8A7795_CLK_S3D1), DEF_MOD("scif2", 310, R8A7795_CLK_S3D4), + DEF_MOD("sdif3", 311, R8A7795_CLK_SD3), + DEF_MOD("sdif2", 312, R8A7795_CLK_SD2), + DEF_MOD("sdif1", 313, R8A7795_CLK_SD1), + DEF_MOD("sdif0", 314, R8A7795_CLK_SD0), DEF_MOD("pcie1", 318, R8A7795_CLK_S3D1), DEF_MOD("pcie0", 319, R8A7795_CLK_S3D1), DEF_MOD("intc-ap", 408, R8A7795_CLK_S3D1),