From patchwork Sat Jan 16 14:17:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dirk Behme X-Patchwork-Id: 8049111 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D48E6BEEE5 for ; Sat, 16 Jan 2016 14:17:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E510120306 for ; Sat, 16 Jan 2016 14:17:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 14367202FE for ; Sat, 16 Jan 2016 14:17:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751918AbcAPORl (ORCPT ); Sat, 16 Jan 2016 09:17:41 -0500 Received: from mail-wm0-f65.google.com ([74.125.82.65]:34834 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751891AbcAPORk (ORCPT ); Sat, 16 Jan 2016 09:17:40 -0500 Received: by mail-wm0-f65.google.com with SMTP id 123so631919wmz.2; Sat, 16 Jan 2016 06:17:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=ntNRbBI4NYfl4Dw38NjGj98el4vdjXY00B/uWoUInks=; b=mUJkZ+XvPaA7O3mRHjhqRJXb91MPKj1X+OaAophinygZ2wrevNldVfHzg6C1e7FgD7 QuqnpBGuDn8UTdTiXiZbbkVUDSUtHy4Q8wnk/vTgAgHH6S38fmGii+7+4hSgFouGOI0M xV97pHWcPXyGhLKnRPqrtqD03TplVdXDnKbH2oVVMfVtJOWNK9sMtLwdJj7yBBjMdZXg YnrAzdCt8sZwMD/KxFzCM6ZbGmGERupx7VMeJDXvbklEFNNqvXUt4UdTEEtQZBnkZJmu 2x9t16+S0vWJXu0Eac5dTo7/cJ/4OWsuNsmWgx9BiRtsU0y200eh0oOG5j5wmTo/W8VM rBew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=ntNRbBI4NYfl4Dw38NjGj98el4vdjXY00B/uWoUInks=; b=QKhJ3xs/pmDo+feRSzu4QkDW4pRPaFZRGdn2JPz+whvdPewErkn+KhlP6Zus4DCw30 CFXdeq/UAZqaky65hf236Qwo5nT+zO/HH45P798qBMH+TTrkFZFA5QyAYdFdzyRn99EN Z6kk5OOw0aPK4+wXNCe8jcpBcbY58XAKLPMa+qfFHcdnxftEwmBCk8n1uXLAWiPmY6nh 4JZaFzHnNEp6vOeu7d5w2IyeCyrjmQ/iZCoKGvnzBqH90rLyKwPQuLWQsCoofCK7zsMz KQrwyqBpr2vm1lmxgrss7N59IzsqVDkjcCC5FO4siBuDdz5grWH6gprgTdHgFJNtBCJ8 uJDw== X-Gm-Message-State: AG10YOTou8lDC46Q8bACuqvXNClwbM+3uO72kpH/0+ZQsmii64sVhZwz07rzH4T4T5Y/iA== X-Received: by 10.28.129.139 with SMTP id c133mr4093842wmd.30.1452953859509; Sat, 16 Jan 2016 06:17:39 -0800 (PST) Received: from localhost.localdomain (p4FEE244A.dip0.t-ipconnect.de. [79.238.36.74]) by smtp.gmail.com with ESMTPSA id s8sm15182067wje.35.2016.01.16.06.17.38 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 16 Jan 2016 06:17:38 -0800 (PST) From: Dirk Behme To: linux-sh@vger.kernel.org, horms@verge.net.au, geert+renesas@glider.be Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Dirk Behme Subject: [PATCH v2] arm64: dts: r8a7795: Add L2 cache-controller nodes Date: Sat, 16 Jan 2016 15:17:36 +0100 Message-Id: <1452953856-5146-1-git-send-email-dirk.behme@gmail.com> X-Mailer: git-send-email 2.7.0 Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Geert Uytterhoeven Add device nodes for the L2 caches, and link the CPU node to its L2 cache node. The L2 cache for the Cortex-A57 CPU cores is 2 MiB large (organized as 128 KiB x 16 ways). Signed-off-by: Geert Uytterhoeven Signed-off-by: Dirk Behme --- Changes in v2: Dropped the not yet merged Cortex A53 part. arch/arm64/boot/dts/renesas/r8a7795.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index a82bce8..a22ae65 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -39,6 +39,7 @@ compatible = "arm,cortex-a57", "arm,armv8"; reg = <0x0>; device_type = "cpu"; + next-level-cache = <&L2_CA57>; enable-method = "psci"; }; @@ -46,22 +47,29 @@ compatible = "arm,cortex-a57","arm,armv8"; reg = <0x1>; device_type = "cpu"; + next-level-cache = <&L2_CA57>; enable-method = "psci"; }; a57_2: cpu@2 { compatible = "arm,cortex-a57","arm,armv8"; reg = <0x2>; device_type = "cpu"; + next-level-cache = <&L2_CA57>; enable-method = "psci"; }; a57_3: cpu@3 { compatible = "arm,cortex-a57","arm,armv8"; reg = <0x3>; device_type = "cpu"; + next-level-cache = <&L2_CA57>; enable-method = "psci"; }; }; + L2_CA57: cache-controller@0 { + compatible = "cache"; + }; + extal_clk: extal { compatible = "fixed-clock"; #clock-cells = <0>;