From patchwork Mon Jan 25 19:15:11 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 8114861 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 52D099F440 for ; Mon, 25 Jan 2016 19:17:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8CEB5202D1 for ; Mon, 25 Jan 2016 19:17:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9F489201F4 for ; Mon, 25 Jan 2016 19:16:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758030AbcAYTQN (ORCPT ); Mon, 25 Jan 2016 14:16:13 -0500 Received: from sauhun.de ([89.238.76.85]:33075 "EHLO pokefinder.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757858AbcAYTPZ (ORCPT ); Mon, 25 Jan 2016 14:15:25 -0500 Received: from p4fe25a15.dip0.t-ipconnect.de ([79.226.90.21]:38046 helo=localhost) by pokefinder.org with esmtpsa (TLS1.2:RSA_AES_128_CBC_SHA1:128) (Exim 4.80) (envelope-from ) id 1aNmbj-0006W6-3W; Mon, 25 Jan 2016 20:15:23 +0100 From: Wolfram Sang To: linux-mmc@vger.kernel.org Cc: Wolfram Sang , linux-renesas-soc@vger.kernel.org, linux-sh@vger.kernel.org, Kuninori Morimoto , Magnus Damm , Yoshihiro Shimoda , Dirk Behme Subject: [PATCH 4/9] mmc: tmio: add flag to reduce delay after changing clock status Date: Mon, 25 Jan 2016 20:15:11 +0100 Message-Id: <1453749316-1848-5-git-send-email-wsa@the-dreams.de> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1453749316-1848-1-git-send-email-wsa@the-dreams.de> References: <1453749316-1848-1-git-send-email-wsa@the-dreams.de> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Wolfram Sang The docs for RCar Gen2 & 3 I have access to, mention delays of 5ms after stop and 1ms after start. Make it possible to apply these values. Signed-off-by: Wolfram Sang --- drivers/mmc/host/tmio_mmc_pio.c | 7 ++++--- include/linux/mfd/tmio.h | 4 ++++ 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c index a10fde40b6c3dd..ffff687e98b1e3 100644 --- a/drivers/mmc/host/tmio_mmc_pio.c +++ b/drivers/mmc/host/tmio_mmc_pio.c @@ -172,7 +172,8 @@ static void tmio_mmc_set_clock(struct tmio_mmc_host *host, host->set_clk_div(host->pdev, (clk>>22) & 1); sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff); - msleep(10); + if (!(host->pdata->flags & TMIO_MMC_FAST_CLK_CHG)) + msleep(10); } static void tmio_mmc_clk_stop(struct tmio_mmc_host *host) @@ -185,14 +186,14 @@ static void tmio_mmc_clk_stop(struct tmio_mmc_host *host) sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 & sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); - msleep(10); + msleep(host->pdata->flags & TMIO_MMC_FAST_CLK_CHG ? 5 : 10); } static void tmio_mmc_clk_start(struct tmio_mmc_host *host) { sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 | sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); - msleep(10); + msleep(host->pdata->flags & TMIO_MMC_FAST_CLK_CHG ? 1 : 10); /* implicit BUG_ON(!res) */ if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) { diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h index 24b86d538e8852..05d58ee5e6a78f 100644 --- a/include/linux/mfd/tmio.h +++ b/include/linux/mfd/tmio.h @@ -65,6 +65,10 @@ * Some controllers can support SDIO IRQ signalling. */ #define TMIO_MMC_SDIO_IRQ (1 << 2) + +/* Some controllers don't need to wait 10ms for clock changes */ +#define TMIO_MMC_FAST_CLK_CHG (1 << 3) + /* * Some controllers require waiting for the SD bus to become * idle before writing to some registers.