| Message ID | 1465714475-24111-17-git-send-email-ysato@users.sourceforge.jp (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Sato-san, On Sun, Jun 12, 2016 at 8:54 AM, Yoshinori Sato <ysato@users.sourceforge.jp> wrote: > --- /dev/null > +++ b/arch/sh/boot/dts/landisk.dts > @@ -0,0 +1,150 @@ > + pllclk: pllclk { > + compatible = "renesas,sh7750-pll-clock"; > + clocks = <&oclk>; > + #clock-cells = <0>; > + renesas,mult = <12>; > + reg = <0xffc00000 2>, <0xffc00008 4>; > + }; > + iclk: iclk { > + compatible = "renesas,sh7750-div-clock"; > + clocks = <&pllclk>; > + #clock-cells = <0>; > + reg = <0xffc00000 2>; > + renesas,offset = <6>; > + clock-output-names = "ick"; clock-output-names is deprecated for clocks providing a single output. > + }; > + bclk: bclk { > + compatible = "renesas,sh7750-div-clock"; > + clocks = <&pllclk>; > + #clock-cells = <0>; > + reg = <0xffc00000 2>; > + renesas,offset = <3>; > + clock-output-names = "bck"; > + }; > + fclk: fclk { > + compatible = "renesas,sh7750-div-clock"; > + clocks = <&pllclk>; > + #clock-cells = <0>; > + reg = <0xffc00000 2>; > + renesas,offset = <0>; > + clock-output-names = "fck"; > + }; I think it will be much easier for maintenance and code reuse to just have a single "cpg" node that's compatible with "renesas,sh7750-cpg", covering all CPG registers. Especially since the various clocks use the same registers. Cfr. drivers/clk/renesas/cpg-mssr.c. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, 13 Jun 2016 17:13:37 +0900, Geert Uytterhoeven wrote: > > Hi Sato-san, > > On Sun, Jun 12, 2016 at 8:54 AM, Yoshinori Sato > <ysato@users.sourceforge.jp> wrote: > > --- /dev/null > > +++ b/arch/sh/boot/dts/landisk.dts > > @@ -0,0 +1,150 @@ > > > + pllclk: pllclk { > > + compatible = "renesas,sh7750-pll-clock"; > > + clocks = <&oclk>; > > + #clock-cells = <0>; > > + renesas,mult = <12>; > > + reg = <0xffc00000 2>, <0xffc00008 4>; > > + }; > > + iclk: iclk { > > + compatible = "renesas,sh7750-div-clock"; > > + clocks = <&pllclk>; > > + #clock-cells = <0>; > > + reg = <0xffc00000 2>; > > + renesas,offset = <6>; > > + clock-output-names = "ick"; > > clock-output-names is deprecated for clocks providing a single output. > > > + }; > > + bclk: bclk { > > + compatible = "renesas,sh7750-div-clock"; > > + clocks = <&pllclk>; > > + #clock-cells = <0>; > > + reg = <0xffc00000 2>; > > + renesas,offset = <3>; > > + clock-output-names = "bck"; > > + }; > > + fclk: fclk { > > + compatible = "renesas,sh7750-div-clock"; > > + clocks = <&pllclk>; > > + #clock-cells = <0>; > > + reg = <0xffc00000 2>; > > + renesas,offset = <0>; > > + clock-output-names = "fck"; > > + }; > > I think it will be much easier for maintenance and code reuse to just have a > single "cpg" node that's compatible with "renesas,sh7750-cpg", covering all > CPG registers. Especially since the various clocks use the same registers. > > Cfr. drivers/clk/renesas/cpg-mssr.c. OK. I'll try. > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
diff --git a/arch/sh/boot/dts/landisk.dts b/arch/sh/boot/dts/landisk.dts new file mode 100644 index 0000000..23396a0 --- /dev/null +++ b/arch/sh/boot/dts/landisk.dts @@ -0,0 +1,150 @@ +#include <dt-bindings/interrupt-controller/sh_intc.h> + +/dts-v1/; +/ { + model = "I/O DATA HDL-U"; + compatible = "iodata,hdl-u"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&shintc>; + chosen { + stdout-path = &sci1; + bootargs = "console=ttySC1,115200"; + }; + aliases { + serial0 = &sci0; + serial1 = &sci1; + }; + + oclk: oscillator { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <22222222>; + }; + pllclk: pllclk { + compatible = "renesas,sh7750-pll-clock"; + clocks = <&oclk>; + #clock-cells = <0>; + renesas,mult = <12>; + reg = <0xffc00000 2>, <0xffc00008 4>; + }; + iclk: iclk { + compatible = "renesas,sh7750-div-clock"; + clocks = <&pllclk>; + #clock-cells = <0>; + reg = <0xffc00000 2>; + renesas,offset = <6>; + clock-output-names = "ick"; + }; + bclk: bclk { + compatible = "renesas,sh7750-div-clock"; + clocks = <&pllclk>; + #clock-cells = <0>; + reg = <0xffc00000 2>; + renesas,offset = <3>; + clock-output-names = "bck"; + }; + fclk: fclk { + compatible = "renesas,sh7750-div-clock"; + clocks = <&pllclk>; + #clock-cells = <0>; + reg = <0xffc00000 2>; + renesas,offset = <0>; + clock-output-names = "fck"; + }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + compatible = "renesas,sh4", "renesas,sh"; + clock-frequency = <266666666>; + }; + }; + memory@0c000000 { + device_type = "memory"; + reg = <0x0c000000 0x4000000>; + }; + shintc: interrupt-controller@ffd00000 { + compatible = "renesas,sh7751-intc"; + #interrupt-cells = <2>; + #address-cells = <1>; + #size-cells = <1>; + interrupt-controller; + reg = <0xffd00000 14>, <0xfe080000 128>; + + }; + cpldintc: cpld@b0000000 { + compatible = "iodata,landisk-intc"; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0xb0000000 8>; + interrupt-map=<0 &shintc 0 0>, <1 &shintc 1 0>, + <2 &shintc 2 0>, <3 &shintc 3 0>, + <4 &shintc 4 0>, <5 &shintc 5 0>, + <6 &shintc 6 0>, <7 &shintc 7 0>; + }; + sci0: serial@ffe00000 { + compatible = "renesas,scif"; + reg = <0xffe00000 0x20>; + interrupts = <evt2irq(0x4e0) 0 + evt2irq(0x500) 0 + evt2irq(0x540) 0 + evt2irq(0x520) 0>; + clocks = <&fclk>; + clock-names = "fck"; + }; + sci1: serial@ffe80000 { + compatible = "renesas,scif"; + reg = <0xffe80000 0x100>; + interrupts = <evt2irq(0x700) 0 + evt2irq(0x720) 0 + evt2irq(0x760) 0 + evt2irq(0x740) 0>; + clocks = <&fclk>; + clock-names = "fck"; + }; + tmu: timer@ffd80000 { + compatible = "renesas,tmu"; + reg = <0xffd80000 12>; + interrupts = <evt2irq(0x400) 0 + evt2irq(0x420) 0 + evt2irq(0x440) 0>; + clocks = <&fclk>; + clock-names = "fck"; + renesas,channels-mask = <0x03>; + }; + + pci: pci-controller@fe200000 { + compatible = "renesas,sh7751-pci", "iodata,landisk"; + device_type = "pci"; + bus-range = <0 0>; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0x02000000 0x00000000 0xfd000000 0xfd000000 0x00000000 0x01000000>, + <0x01000000 0x00000000 0xfe240000 0x00000000 0x00000000 0x00040000>; + reg = <0xfe200000 0x0400>, + <0x0c000000 0x04000000>, + <0xff800000 0x0030>; + #interrupt-cells = <1>; + interrupt-map-mask = <0x1800 0 7>; + interrupt-map = <0x0000 0 1 &cpldintc evt2irq(0x2a0) 0 + 0x0000 0 2 &cpldintc evt2irq(0x2c0) 0 + 0x0000 0 3 &cpldintc evt2irq(0x2e0) 0 + 0x0000 0 4 &cpldintc evt2irq(0x300) 0 + + 0x0800 0 1 &cpldintc evt2irq(0x2c0) 0 + 0x0800 0 2 &cpldintc evt2irq(0x2e0) 0 + 0x0800 0 3 &cpldintc evt2irq(0x300) 0 + 0x0800 0 4 &cpldintc evt2irq(0x2a0) 0 + + 0x1000 0 1 &cpldintc evt2irq(0x2e0) 0 + 0x1000 0 2 &cpldintc evt2irq(0x300) 0 + 0x1000 0 3 &cpldintc evt2irq(0x2a0) 0 + 0x1000 0 4 &cpldintc evt2irq(0x2c0) 0 + + 0x1800 0 1 &cpldintc evt2irq(0x300) 0 + 0x1800 0 2 &cpldintc evt2irq(0x2a0) 0 + 0x1800 0 3 &cpldintc evt2irq(0x2c0) 0 + 0x1800 0 4 &cpldintc evt2irq(0x2e0) 0>; + }; +};
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> --- arch/sh/boot/dts/landisk.dts | 150 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 150 insertions(+) create mode 100644 arch/sh/boot/dts/landisk.dts