From patchwork Sun Jul 3 16:46:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 9211349 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C25E360752 for ; Sun, 3 Jul 2016 16:52:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B35A8285C4 for ; Sun, 3 Jul 2016 16:52:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A8424285E8; Sun, 3 Jul 2016 16:52:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 12282285C4 for ; Sun, 3 Jul 2016 16:52:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932120AbcGCQwk (ORCPT ); Sun, 3 Jul 2016 12:52:40 -0400 Received: from mail1.asahi-net.or.jp ([202.224.39.197]:9901 "EHLO mail1.asahi-net.or.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752852AbcGCQrO (ORCPT ); Sun, 3 Jul 2016 12:47:14 -0400 Received: from sa76r4 (y081184.ppp.asahi-net.or.jp [118.243.81.184]) by mail1.asahi-net.or.jp (Postfix) with ESMTP id B3F17DA98; Mon, 4 Jul 2016 01:47:07 +0900 (JST) Received: from localhost (localhost [127.0.0.1]) by sa76r4 (Postfix) with ESMTP id A81613815; Mon, 4 Jul 2016 01:47:07 +0900 (JST) X-Virus-Scanned: Debian amavisd-new at sa76r4.localdomain Received: from sa76r4 ([127.0.0.1]) by localhost (sa76r4.localdomain [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id VLvSJBvvrygs; Mon, 4 Jul 2016 01:47:07 +0900 (JST) Received: by sa76r4 (Postfix, from userid 1000) id 8D60E7803; Mon, 4 Jul 2016 01:47:07 +0900 (JST) From: Yoshinori Sato To: devicetree@vger.kernel.org, linux-sh@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Yoshinori Sato Subject: [PATCH v5 14/22] sh: SH7751 core dtsi Date: Mon, 4 Jul 2016 01:46:34 +0900 Message-Id: <1467564402-2649-15-git-send-email-ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1467564402-2649-1-git-send-email-ysato@users.sourceforge.jp> References: <1467564402-2649-1-git-send-email-ysato@users.sourceforge.jp> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP SH7751 core and internal peripheral define. Signed-off-by: Yoshinori Sato --- arch/sh/boot/dts/include/dt-bindings | 1 + arch/sh/boot/dts/sh7751.dtsi | 83 ++++++++++++++++++++++ include/dt-bindings/clock/renesas-sh7750.h | 26 +++++++ include/dt-bindings/interrupt-controller/sh_intc.h | 2 + 4 files changed, 112 insertions(+) create mode 120000 arch/sh/boot/dts/include/dt-bindings create mode 100644 arch/sh/boot/dts/sh7751.dtsi create mode 100644 include/dt-bindings/clock/renesas-sh7750.h create mode 100644 include/dt-bindings/interrupt-controller/sh_intc.h diff --git a/arch/sh/boot/dts/include/dt-bindings b/arch/sh/boot/dts/include/dt-bindings new file mode 120000 index 0000000..08c00e4 --- /dev/null +++ b/arch/sh/boot/dts/include/dt-bindings @@ -0,0 +1 @@ +../../../../../include/dt-bindings \ No newline at end of file diff --git a/arch/sh/boot/dts/sh7751.dtsi b/arch/sh/boot/dts/sh7751.dtsi new file mode 100644 index 0000000..713e72e --- /dev/null +++ b/arch/sh/boot/dts/sh7751.dtsi @@ -0,0 +1,83 @@ +/* + * Device Tree Source for the SH7751 + * + * Copyright (C) 2016 Yoshinori Sato + */ + +#include +#include + +/ { + oclk: oscillator { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + }; + cpg: clock-controller@ffc00000 { + compatible = "renesas,sh7750-cpg"; + clocks = <&oclk>; + #clock-cells = <1>; + renesas,mult = <12>; + reg = <0xffc00000 32>, <0xfe0a0000 16>; + }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + compatible = "renesas,sh4", "renesas,sh"; + clock-frequency = <266666666>; + }; + }; + shintc: interrupt-controller@ffd00000 { + compatible = "renesas,sh7751-intc"; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0xffd00000 14>, <0xfe080000 128>; + + }; + sci0: serial@ffe00000 { + compatible = "renesas,sci"; + reg = <0xffe00000 0x20>; + interrupts = , + , + , + ; + clocks = <&cpg SH7750_CLK_SCI>; + clock-names = "fck"; + status = "disabled"; + }; + sci1: serial@ffe80000 { + compatible = "renesas,scif"; + reg = <0xffe80000 0x100>; + interrupts = , + , + , + ; + clocks = <&cpg SH7750_CLK_SCIF>; + clock-names = "fck"; + status = "disabled"; + }; + tmu: timer@ffd80000 { + compatible = "renesas,tmu"; + reg = <0xffd80000 12>; + interrupts = , + , + ; + clocks = <&cpg SH7750_CLK_TMU0>; + clock-names = "fck"; + renesas,channels-mask = <0x03>; + }; + pci: pci-controller@fe200000 { + compatible = "renesas,sh7751-pci"; + device_type = "pci"; + bus-range = <0 0>; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0x02000000 0x00000000 0xfd000000 0xfd000000 0x00000000 0x01000000>, + <0x01000000 0x00000000 0xfe240000 0x00000000 0x00000000 0x00040000>; + reg = <0xfe200000 0x0400>, <0xff800000 0x0030>; + #interrupt-cells = <1>; + interrupt-map-mask = <0x1800 0 7>; + status = "disabled"; + }; +}; diff --git a/include/dt-bindings/clock/renesas-sh7750.h b/include/dt-bindings/clock/renesas-sh7750.h new file mode 100644 index 0000000..546c0b1 --- /dev/null +++ b/include/dt-bindings/clock/renesas-sh7750.h @@ -0,0 +1,26 @@ +/* + * Copyright (C) 2016 Yoshinori Sato + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#ifndef __DT_BINDINGS_CLOCK_RENESAS_SH7750_H__ +#define __DT_BINDINGS_CLOCK_RENESAS_SH7750_H__ + +#define SH7750_CLK_SCI 0 +#define SH7750_CLK_RTC 1 +#define SH7750_CLK_TMU0 2 +#define SH7750_CLK_TMU1 3 +#define SH7750_CLK_TMU2 4 +#define SH7750_CLK_SCIF 5 +#define SH7750_CLK_DMAC 6 +#define SH7750_CLK_UBC 7 +#define SH7750_CLK_SQ 8 +#define SH7750_CLK_INTC 9 +#define SH7750_CLK_TMU3 10 +#define SH7750_CLK_TMU4 11 +#define SH7750_CLK_PCIC 12 + +#endif /* __DT_BINDINGS_CLOCK_RENESAS_CPG_MSSR_H__ */ diff --git a/include/dt-bindings/interrupt-controller/sh_intc.h b/include/dt-bindings/interrupt-controller/sh_intc.h new file mode 100644 index 0000000..8c9dcdc --- /dev/null +++ b/include/dt-bindings/interrupt-controller/sh_intc.h @@ -0,0 +1,2 @@ +#define evt2irq(evt) (((evt) >> 5) - 16) +#define irq2evt(irq) (((irq) + 16) << 5)