From patchwork Thu May 7 10:48:13 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 22303 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n47ApMop032058 for ; Thu, 7 May 2009 10:51:23 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756926AbZEGKvA (ORCPT ); Thu, 7 May 2009 06:51:00 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1756809AbZEGKvA (ORCPT ); Thu, 7 May 2009 06:51:00 -0400 Received: from rv-out-0506.google.com ([209.85.198.239]:38249 "EHLO rv-out-0506.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752667AbZEGKu7 (ORCPT ); Thu, 7 May 2009 06:50:59 -0400 Received: by rv-out-0506.google.com with SMTP id f9so548169rvb.1 for ; Thu, 07 May 2009 03:50:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:date:message-id :subject; bh=dC4qdaL7PEvm54GzVHfOz7sK1yFjVqWXqGOA60odGwc=; b=LE9VEVH0QGzEMaBoxbuvXK6weba1+AHMFLvkfd29JpmffdVG7DlpHMJX1racSLKm1S JNhZTXooXaHZLVBUpf0/nHc49M9MeazWFzWXzMTFJ0irDPEKkvxIeaz0SdDKj9UhSjIN iAPblO2A9QN9+aRPOXgerQM5OByUEVI3qasWA= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:date:message-id:subject; b=HeXc8aiSAZprzuJW8gfV/+H6+5w9MgpWKyL7+c8zrFi+X/RhJNHZai9gWsuW5/KuEu +qCSrvJn5tNV3Rq/w1+ft2alCPCuvYmiJ0l91MJg2u0AGr+6d1uWM+MKKmQUzdPScDI3 Xi5F/RyAzugH/gvMO3lStUve70QZvdzZwQNEM= Received: by 10.114.137.2 with SMTP id k2mr2225809wad.18.1241693459586; Thu, 07 May 2009 03:50:59 -0700 (PDT) Received: from rx1.opensource.se (210.5.32.202.bf.2iij.net [202.32.5.210]) by mx.google.com with ESMTPS id l38sm14658851waf.3.2009.05.07.03.50.57 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 07 May 2009 03:50:58 -0700 (PDT) From: Magnus Damm To: linux-sh@vger.kernel.org Cc: Magnus Damm , lethal@linux-sh.org Date: Thu, 07 May 2009 19:48:13 +0900 Message-Id: <20090507104813.31966.8510.sendpatchset@rx1.opensource.se> Subject: [PATCH] sh: sh7785lcr clock fixes Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org From: Magnus Damm Update the sh7785lcr board defconfigs to fix PCLK values and add mode4 run time check. Signed-off-by: Magnus Damm --- arch/sh/boards/board-sh7785lcr.c | 10 ++++++++++ arch/sh/configs/sh7785lcr_32bit_defconfig | 2 +- arch/sh/configs/sh7785lcr_defconfig | 2 +- 3 files changed, 12 insertions(+), 2 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- 0001/arch/sh/boards/board-sh7785lcr.c +++ work/arch/sh/boards/board-sh7785lcr.c 2009-05-07 18:34:15.000000000 +0900 @@ -289,6 +289,9 @@ static void sh7785lcr_power_off(void) cpu_relax(); } +#define PNCR 0xffe70018 +#define PNDR 0xffe70038 + /* Initialize the board */ static void __init sh7785lcr_setup(char **cmdline_p) { @@ -301,6 +304,13 @@ static void __init sh7785lcr_setup(char /* sm501 DRAM configuration */ sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL; writel(0x000307c2, sm501_reg); + + /* read PN5 pin to get MODE4/PLL configuration for clock code */ + ctrl_outw(ctrl_inw(PNCR) | 0x0c00, PNCR); + if (ctrl_inb(PNDR) & 0x20) + parse_early_options("mode4_pin=high"); + else + parse_early_options("mode4_pin=low"); } /* --- 0001/arch/sh/configs/sh7785lcr_32bit_defconfig +++ work/arch/sh/configs/sh7785lcr_32bit_defconfig 2009-05-07 18:34:23.000000000 +0900 @@ -258,7 +258,7 @@ CONFIG_SH_SH7785LCR=y # CONFIG_SH_TMU=y CONFIG_SH_TIMER_IRQ=28 -CONFIG_SH_PCLK_FREQ=50000000 +CONFIG_SH_PCLK_FREQ=33333333 CONFIG_TICK_ONESHOT=y # CONFIG_NO_HZ is not set CONFIG_HIGH_RES_TIMERS=y --- 0001/arch/sh/configs/sh7785lcr_defconfig +++ work/arch/sh/configs/sh7785lcr_defconfig 2009-05-07 18:34:23.000000000 +0900 @@ -252,7 +252,7 @@ CONFIG_SH_SH7785LCR_29BIT_PHYSMAPS=y # CONFIG_SH_TMU=y CONFIG_SH_TIMER_IRQ=28 -CONFIG_SH_PCLK_FREQ=50000000 +CONFIG_SH_PCLK_FREQ=33333333 CONFIG_TICK_ONESHOT=y # CONFIG_NO_HZ is not set CONFIG_HIGH_RES_TIMERS=y