From patchwork Thu May 28 11:56:21 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 26722 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n4SBxZvL008424 for ; Thu, 28 May 2009 11:59:36 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757677AbZE1L7c (ORCPT ); Thu, 28 May 2009 07:59:32 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1756667AbZE1L7b (ORCPT ); Thu, 28 May 2009 07:59:31 -0400 Received: from wf-out-1314.google.com ([209.85.200.174]:40139 "EHLO wf-out-1314.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754817AbZE1L7a (ORCPT ); Thu, 28 May 2009 07:59:30 -0400 Received: by wf-out-1314.google.com with SMTP id 26so1811457wfd.4 for ; Thu, 28 May 2009 04:59:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:date:message-id :subject; bh=B8Ym/0A9duLB0JstAfSSI9kHqy/WIdqW5ke85BmTNEM=; b=p8TR5zP7MqPTndfNumDeEouFVQhQW/P9F6PD/izGTVsiZjvp/SYqI4Xox4beGxnAXA zTjqbx028w+yqr/MXVMp9GmvBI9V6imnSKv6rsVbkgKrb13opThlbFmimEGHF1/GdVwJ O6/b0BISkimeV7YR+Jmw2tej6NTy5aHt/UOcQ= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:date:message-id:subject; b=hWzNCbA0LU5lxTCYI6qeXMi8PhRfPzVIM4TAi4lofoP6mlmOOb7DDar6XKdXw6lh6m 1Vz91va2ZxD7Ls97V2DRO3VK9nOE+fL/QJu/2+FQjC26koTsrwBqBxYQ/G5U6lnokxIO ktq2PAEils/kgiZfLYv8/mSeRLivs6CZ3MBqk= Received: by 10.142.217.3 with SMTP id p3mr418604wfg.191.1243511972062; Thu, 28 May 2009 04:59:32 -0700 (PDT) Received: from rx1.opensource.se (210.5.32.202.bf.2iij.net [202.32.5.210]) by mx.google.com with ESMTPS id 29sm449790wfg.8.2009.05.28.04.59.30 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 28 May 2009 04:59:31 -0700 (PDT) From: Magnus Damm To: linux-sh@vger.kernel.org Cc: Magnus Damm , lethal@linux-sh.org Date: Thu, 28 May 2009 20:56:21 +0900 Message-Id: <20090528115621.5770.60114.sendpatchset@rx1.opensource.se> Subject: [PATCH] sh: sh7785 mode pin definitions Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org From: Magnus Damm This patch adds sh7785 mode pin definitions. Mode pins and pin function controller comments are added as well. Signed-off-by: Magnus Damm --- arch/sh/include/cpu-sh4/cpu/sh7785.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- 0001/arch/sh/include/cpu-sh4/cpu/sh7785.h +++ work/arch/sh/include/cpu-sh4/cpu/sh7785.h 2009-05-28 20:42:21.000000000 +0900 @@ -1,6 +1,28 @@ #ifndef __ASM_SH7785_H__ #define __ASM_SH7785_H__ +/* Boot Mode Pins, more information in sh7785 manual Rev.1.00, page 1628 */ +#define MODE_PIN_MODE0 0 /* CPG - Initial Pck/Bck Frequency [FRQMR1] */ +#define MODE_PIN_MODE1 1 /* CPG - Initial Uck/SHck/DDRck Frequency [FRQMR1] */ +#define MODE_PIN_MODE2 2 /* CPG - Reserved (L: Normal operation) */ +#define MODE_PIN_MODE3 3 /* CPG - Reserved (L: Normal operation) */ +#define MODE_PIN_MODE4 4 /* CPG - Initial PLL setting (72x/36x) */ +#define MODE_PIN_MODE5 5 /* LBSC - Area0 Memory Type / Bus Width [CS0BCR.8] */ +#define MODE_PIN_MODE6 6 /* LBSC - Area0 Memory Type / Bus Width [CS0BCR.9] */ +#define MODE_PIN_MODE7 7 /* LBSC - Area0 Memory Type / Bus Width [CS0BCR.3] */ +#define MODE_PIN_MODE8 8 /* LBSC - Endian Mode (L: Big, H: Little) [BCR.31] */ +#define MODE_PIN_MODE9 9 /* LBSC - Master/Slave Mode (L: Slave) [BCR.30] */ +#define MODE_PIN_MODE10 10 /* CPG - Clock Input (L: Ext Clk, H: Crystal) */ +#define MODE_PIN_MODE11 11 /* PCI - Pin Mode (LL: PCI host, LH: PCI slave) */ +#define MODE_PIN_MODE12 12 /* PCI - Pin Mode (HL: Local bus, HH: DU) */ +#define MODE_PIN_MODE13 13 /* Boot Address Mode (L: 29-bit, H: 32-bit) */ +#define MODE_PIN_MODE14 14 /* Reserved (H: Normal operation) */ +#define MODE_PIN_MPMD 15 /* Emulation Mode (L: Emulation mode, H: LSI mode) */ + +/* Pin Function Controller: + * GPIO_FN_xx - GPIO used to select pin function + * GPIO_Pxx - GPIO mapped to real I/O pin on CPU + */ enum { /* PA */ GPIO_PA7, GPIO_PA6, GPIO_PA5, GPIO_PA4,