diff mbox

sh: shared mstp32 clock code

Message ID 20090528125229.6462.23713.sendpatchset@rx1.opensource.se (mailing list archive)
State Accepted
Headers show

Commit Message

Magnus Damm May 28, 2009, 12:52 p.m. UTC 
From: Magnus Damm <damm@igel.co.jp>

Add shared 32-bit module stop bit clock support.

Processor specific code can use SH_CLK_MSTP32()
to initialize module stop bit clocks, and then
use sh_clk_mstp32() for registration.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
---

 arch/sh/include/asm/clock.h    |   13 +++++++++++++
 arch/sh/kernel/cpu/clock-cpg.c |   35 +++++++++++++++++++++++++++++++++++
 2 files changed, 48 insertions(+)

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Comments

Paul Mundt June 1, 2009, 9:14 a.m. UTC | #1 
On Thu, May 28, 2009 at 09:52:29PM +0900, Magnus Damm wrote:
> Add shared 32-bit module stop bit clock support.
> 
> Processor specific code can use SH_CLK_MSTP32()
> to initialize module stop bit clocks, and then
> use sh_clk_mstp32() for registration.

On Thu, May 28, 2009 at 10:01:53PM +0900, Magnus Damm wrote:
> Hook up the shared 32-bit module stop bit code to sh7785.

On Thu, May 28, 2009 at 10:11:31PM +0900, Magnus Damm wrote:
> Add shared code for 4-bit divisor clocks.

On Thu, May 28, 2009 at 10:13:56PM +0900, Magnus Damm wrote:
> Hook up the shared 4-bit divisor clock code to sh7785.

Applied, thanks.
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diff mbox

Patch

--- 0001/arch/sh/include/asm/clock.h
+++ work/arch/sh/include/asm/clock.h	2009-05-28 16:56:09.000000000 +0900
@@ -117,4 +117,17 @@  long clk_rate_table_round(struct clk *cl
 			  struct cpufreq_frequency_table *freq_table,
 			  unsigned long rate);
 
+#define SH_CLK_MSTP32(_name, _id, _parent, _enable_reg,	\
+	    _enable_bit, _flags)			\
+{							\
+	.name		= _name,			\
+	.id		= _id,				\
+	.parent		= _parent,			\
+	.enable_reg	= (void __iomem *)_enable_reg,	\
+	.enable_bit	= _enable_bit,			\
+	.flags		= _flags,			\
+}
+
+int sh_clk_mstp32_register(struct clk *clks, int nr);
+
 #endif /* __ASM_SH_CLOCK_H */
--- 0001/arch/sh/kernel/cpu/clock-cpg.c
+++ work/arch/sh/kernel/cpu/clock-cpg.c	2009-05-28 20:37:03.000000000 +0900
@@ -1,7 +1,42 @@ 
 #include <linux/clk.h>
 #include <linux/compiler.h>
+#include <linux/io.h>
 #include <asm/clock.h>
 
+static int sh_clk_mstp32_enable(struct clk *clk)
+{
+	__raw_writel(__raw_readl(clk->enable_reg) & ~(1 << clk->enable_bit),
+		     clk->enable_reg);
+	return 0;
+}
+
+static void sh_clk_mstp32_disable(struct clk *clk)
+{
+	__raw_writel(__raw_readl(clk->enable_reg) | (1 << clk->enable_bit),
+		     clk->enable_reg);
+}
+
+static struct clk_ops sh_clk_mstp32_clk_ops = {
+	.enable		= sh_clk_mstp32_enable,
+	.disable	= sh_clk_mstp32_disable,
+	.recalc		= followparent_recalc,
+};
+
+int __init sh_clk_mstp32_register(struct clk *clks, int nr)
+{
+	struct clk *clkp;
+	int ret = 0;
+	int k;
+
+	for (k = 0; !ret && (k < nr); k++) {
+		clkp = clks + k;
+		clkp->ops = &sh_clk_mstp32_clk_ops;
+		ret = clk_register(clkp);
+	}
+
+	return ret;
+}
+
 #ifdef CONFIG_SH_CLK_CPG_LEGACY
 static struct clk master_clk = {
 	.name		= "master_clk",