From patchwork Thu May 28 13:01:53 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 26739 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n4SD56gi013612 for ; Thu, 28 May 2009 13:05:06 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757161AbZE1NFD (ORCPT ); Thu, 28 May 2009 09:05:03 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1757964AbZE1NFD (ORCPT ); Thu, 28 May 2009 09:05:03 -0400 Received: from rv-out-0506.google.com ([209.85.198.228]:18627 "EHLO rv-out-0506.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757161AbZE1NFB (ORCPT ); Thu, 28 May 2009 09:05:01 -0400 Received: by rv-out-0506.google.com with SMTP id f9so1656398rvb.1 for ; Thu, 28 May 2009 06:05:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:date:message-id :subject; bh=PXP8AauA/ahzCAYbT8siPXVwL4SNqjgOjumHFoWr+Fg=; b=Vbx19P9Q0xNWr3R8xlBfvREGzvhHyBaUvyRek3f3Bsyki4md8diTi2a+AaTIpnF32U lzsWidDkKVb8xmjN57/lBKrjZLXDKPZHBUX32NO6ZEsF9dbl2zVHiydxB77jhCSbTnDM yBMAl3Vhuov0Qcbh6Z8gi3kS05wz35wBktEOA= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:date:message-id:subject; b=BidMplmuuWnhIEQXe3WDRTIlq3vTauc8NdVV+muwr3f77+MJSPpHxQZEfD31Hpbtjs uAm/zOXgafzHeRKggJP6AK6LxVhvrMEG66OkVPKBylI2SkMRUhNmyBYdYDIK+7mqXlw0 2WyTYlvn3WOdddUEC9bf+Yn/Pm9P9NvS/HnI4= Received: by 10.140.141.21 with SMTP id o21mr643464rvd.271.1243515902877; Thu, 28 May 2009 06:05:02 -0700 (PDT) Received: from rx1.opensource.se (210.5.32.202.bf.2iij.net [202.32.5.210]) by mx.google.com with ESMTPS id b8sm7100237rvf.54.2009.05.28.06.05.01 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 28 May 2009 06:05:02 -0700 (PDT) From: Magnus Damm To: linux-sh@vger.kernel.org Cc: Magnus Damm , lethal@linux-sh.org Date: Thu, 28 May 2009 22:01:53 +0900 Message-Id: <20090528130153.6566.78971.sendpatchset@rx1.opensource.se> Subject: [PATCH] sh: hook upshared mstp32 clock code to sh7785 Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org From: Magnus Damm Hook up the shared 32-bit module stop bit code to sh7785. Signed-off-by: Magnus Damm --- arch/sh/kernel/cpu/sh4a/clock-sh7785.c | 80 ++++++++++---------------------- 1 file changed, 25 insertions(+), 55 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- 0005/arch/sh/kernel/cpu/sh4a/clock-sh7785.c +++ work/arch/sh/kernel/cpu/sh4a/clock-sh7785.c 2009-05-28 16:58:07.000000000 +0900 @@ -193,65 +193,34 @@ static struct clk *clks[] = { &umem_clk, }; -static int mstpcr_clk_enable(struct clk *clk) -{ - __raw_writel(__raw_readl(clk->enable_reg) & ~(1 << clk->enable_bit), - clk->enable_reg); - return 0; -} - -static void mstpcr_clk_disable(struct clk *clk) -{ - __raw_writel(__raw_readl(clk->enable_reg) | (1 << clk->enable_bit), - clk->enable_reg); -} - -static struct clk_ops mstpcr_clk_ops = { - .enable = mstpcr_clk_enable, - .disable = mstpcr_clk_disable, - .recalc = followparent_recalc, -}; - #define MSTPCR0 0xffc80030 #define MSTPCR1 0xffc80034 -#define CLK(_name, _id, _parent, _enable_reg, \ - _enable_bit, _flags) \ -{ \ - .name = _name, \ - .id = _id, \ - .parent = _parent, \ - .enable_reg = (void __iomem *)_enable_reg, \ - .enable_bit = _enable_bit, \ - .flags = _flags, \ - .ops = &mstpcr_clk_ops, \ -} - -static struct clk mstpcr_clks[] = { +static struct clk mstp_clks[] = { /* MSTPCR0 */ - CLK("scif_fck", 5, &peripheral_clk, MSTPCR0, 29, 0), - CLK("scif_fck", 4, &peripheral_clk, MSTPCR0, 28, 0), - CLK("scif_fck", 3, &peripheral_clk, MSTPCR0, 27, 0), - CLK("scif_fck", 2, &peripheral_clk, MSTPCR0, 26, 0), - CLK("scif_fck", 1, &peripheral_clk, MSTPCR0, 25, 0), - CLK("scif_fck", 0, &peripheral_clk, MSTPCR0, 24, 0), - CLK("ssi_fck", 1, &peripheral_clk, MSTPCR0, 21, 0), - CLK("ssi_fck", 0, &peripheral_clk, MSTPCR0, 20, 0), - CLK("hac_fck", 1, &peripheral_clk, MSTPCR0, 17, 0), - CLK("hac_fck", 0, &peripheral_clk, MSTPCR0, 16, 0), - CLK("mmcif_fck", -1, &peripheral_clk, MSTPCR0, 13, 0), - CLK("flctl_fck", -1, &peripheral_clk, MSTPCR0, 12, 0), - CLK("tmu345_fck", -1, &peripheral_clk, MSTPCR0, 9, 0), - CLK("tmu012_fck", -1, &peripheral_clk, MSTPCR0, 8, 0), - CLK("siof_fck", -1, &peripheral_clk, MSTPCR0, 3, 0), - CLK("hspi_fck", -1, &peripheral_clk, MSTPCR0, 2, 0), + SH_CLK_MSTP32("scif_fck", 5, &peripheral_clk, MSTPCR0, 29, 0), + SH_CLK_MSTP32("scif_fck", 4, &peripheral_clk, MSTPCR0, 28, 0), + SH_CLK_MSTP32("scif_fck", 3, &peripheral_clk, MSTPCR0, 27, 0), + SH_CLK_MSTP32("scif_fck", 2, &peripheral_clk, MSTPCR0, 26, 0), + SH_CLK_MSTP32("scif_fck", 1, &peripheral_clk, MSTPCR0, 25, 0), + SH_CLK_MSTP32("scif_fck", 0, &peripheral_clk, MSTPCR0, 24, 0), + SH_CLK_MSTP32("ssi_fck", 1, &peripheral_clk, MSTPCR0, 21, 0), + SH_CLK_MSTP32("ssi_fck", 0, &peripheral_clk, MSTPCR0, 20, 0), + SH_CLK_MSTP32("hac_fck", 1, &peripheral_clk, MSTPCR0, 17, 0), + SH_CLK_MSTP32("hac_fck", 0, &peripheral_clk, MSTPCR0, 16, 0), + SH_CLK_MSTP32("mmcif_fck", -1, &peripheral_clk, MSTPCR0, 13, 0), + SH_CLK_MSTP32("flctl_fck", -1, &peripheral_clk, MSTPCR0, 12, 0), + SH_CLK_MSTP32("tmu345_fck", -1, &peripheral_clk, MSTPCR0, 9, 0), + SH_CLK_MSTP32("tmu012_fck", -1, &peripheral_clk, MSTPCR0, 8, 0), + SH_CLK_MSTP32("siof_fck", -1, &peripheral_clk, MSTPCR0, 3, 0), + SH_CLK_MSTP32("hspi_fck", -1, &peripheral_clk, MSTPCR0, 2, 0), /* MSTPCR1 */ - CLK("hudi_fck", -1, NULL, MSTPCR1, 19, 0), - CLK("ubc_fck", -1, NULL, MSTPCR1, 17, 0), - CLK("dmac_11_6_fck", -1, NULL, MSTPCR1, 5, 0), - CLK("dmac_5_0_fck", -1, NULL, MSTPCR1, 4, 0), - CLK("gdta_fck", -1, NULL, MSTPCR1, 0, 0), + SH_CLK_MSTP32("hudi_fck", -1, NULL, MSTPCR1, 19, 0), + SH_CLK_MSTP32("ubc_fck", -1, NULL, MSTPCR1, 17, 0), + SH_CLK_MSTP32("dmac_11_6_fck", -1, NULL, MSTPCR1, 5, 0), + SH_CLK_MSTP32("dmac_5_0_fck", -1, NULL, MSTPCR1, 4, 0), + SH_CLK_MSTP32("gdta_fck", -1, NULL, MSTPCR1, 0, 0), }; int __init arch_clk_init(void) @@ -260,8 +229,9 @@ int __init arch_clk_init(void) for (i = 0; i < ARRAY_SIZE(clks); i++) ret |= clk_register(clks[i]); - for (i = 0; i < ARRAY_SIZE(mstpcr_clks); i++) - ret |= clk_register(&mstpcr_clks[i]); + + if (!ret) + ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks)); return ret; }