From patchwork Thu May 28 13:11:31 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 26740 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n4SDEiMi014325 for ; Thu, 28 May 2009 13:14:44 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756861AbZE1NOl (ORCPT ); Thu, 28 May 2009 09:14:41 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1756455AbZE1NOl (ORCPT ); Thu, 28 May 2009 09:14:41 -0400 Received: from rv-out-0506.google.com ([209.85.198.228]:19041 "EHLO rv-out-0506.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756082AbZE1NOk (ORCPT ); Thu, 28 May 2009 09:14:40 -0400 Received: by rv-out-0506.google.com with SMTP id f9so1657944rvb.1 for ; Thu, 28 May 2009 06:14:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:date:message-id :subject; bh=6NRyuD0t1JKxOVm5nrRfGxI9hENEindbN1IkmDSElY0=; b=wysulR/YlY8DUaa+SvzOBqCDFEDJIV4VGF1PmLUAmhFlX0zo8MGShiJIiio63+uhAK Nm9EbSpt2kYM3B48OHEJyfXeyX1qilqtrcn/FrttM3/qClzVcw4hVpWou0kNBv1RoIH1 O0XdYTYzNY1mQVLR0aNac9YS2V/MkukFH962M= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:date:message-id:subject; b=TIZD/dsqeCCIeVWq/eMj4vJ+awTGJeAVwnDX2qJaZXYnK8FVYozgT79vLegDwDuIhh T4HEhQ1TtEQPtK9MtGmK1YRqPQzG8jMy3IvocqYwUaGsNBshblBoPbMgxqzkkadRJug1 qW37wXtgAlpkfNzP6j0I4YW/QstuPPhEwZavU= Received: by 10.141.197.21 with SMTP id z21mr675659rvp.125.1243516481738; Thu, 28 May 2009 06:14:41 -0700 (PDT) Received: from rx1.opensource.se (210.5.32.202.bf.2iij.net [202.32.5.210]) by mx.google.com with ESMTPS id f42sm9427436rvb.1.2009.05.28.06.14.40 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 28 May 2009 06:14:41 -0700 (PDT) From: Magnus Damm To: linux-sh@vger.kernel.org Cc: Magnus Damm , lethal@linux-sh.org Date: Thu, 28 May 2009 22:11:31 +0900 Message-Id: <20090528131131.6691.13869.sendpatchset@rx1.opensource.se> Subject: [PATCH] sh: shared div4 clock code Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org From: Magnus Damm Add shared code for 4-bit divisor clocks. Processor specific code can use SH_CLK_DIV4() to initialize div4 clocks, and then use sh_clk_div4_register() for registration. Signed-off-by: Magnus Damm --- arch/sh/include/asm/clock.h | 15 ++++++++++ arch/sh/kernel/cpu/clock-cpg.c | 55 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 70 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- 0006/arch/sh/include/asm/clock.h +++ work/arch/sh/include/asm/clock.h 2009-05-28 17:49:19.000000000 +0900 @@ -3,6 +3,7 @@ #include #include +#include #include #include @@ -41,6 +42,7 @@ struct clk { unsigned long arch_flags; void *priv; struct dentry *dentry; + struct cpufreq_frequency_table *freq_table; }; struct clk_lookup { @@ -130,4 +132,17 @@ long clk_rate_table_round(struct clk *cl int sh_clk_mstp32_register(struct clk *clks, int nr); +#define SH_CLK_DIV4(_name, _parent, _reg, _shift, _div_bitmap, _flags) \ +{ \ + .name = _name, \ + .parent = _parent, \ + .enable_reg = (void __iomem *)_reg, \ + .enable_bit = _shift, \ + .arch_flags = _div_bitmap, \ + .flags = _flags, \ +} + +int sh_clk_div4_register(struct clk *clks, int nr, + struct clk_div_mult_table *table); + #endif /* __ASM_SH_CLOCK_H */ --- 0006/arch/sh/kernel/cpu/clock-cpg.c +++ work/arch/sh/kernel/cpu/clock-cpg.c 2009-05-28 18:28:09.000000000 +0900 @@ -1,5 +1,6 @@ #include #include +#include #include #include @@ -37,6 +38,60 @@ int __init sh_clk_mstp32_register(struct return ret; } +static unsigned long sh_clk_div4_recalc(struct clk *clk) +{ + struct clk_div_mult_table *table = clk->priv; + unsigned int idx; + + clk_rate_table_build(clk, clk->freq_table, table->nr_divisors, + table, &clk->arch_flags); + + idx = (__raw_readl(clk->enable_reg) >> clk->enable_bit) & 0x000f; + + return clk->freq_table[idx].frequency; +} + +static long sh_clk_div4_round_rate(struct clk *clk, unsigned long rate) +{ + return clk_rate_table_round(clk, clk->freq_table, rate); +} + +static struct clk_ops sh_clk_div4_clk_ops = { + .recalc = sh_clk_div4_recalc, + .round_rate = sh_clk_div4_round_rate, +}; + +int __init sh_clk_div4_register(struct clk *clks, int nr, + struct clk_div_mult_table *table) +{ + struct clk *clkp; + void *freq_table; + int nr_divs = table->nr_divisors; + int freq_table_size = sizeof(struct cpufreq_frequency_table); + int ret = 0; + int k; + + k = nr_divs + 1; + freq_table = alloc_bootmem(freq_table_size * nr * (nr_divs + 1)); + if (!freq_table) + return -ENOMEM; + + for (k = 0; !ret && (k < nr); k++) { + clkp = clks + k; + + clkp->ops = &sh_clk_div4_clk_ops; + clkp->id = -1; + clkp->priv = table; + + clkp->freq_table = freq_table + (k * freq_table_size); + clkp->freq_table[nr_divs].frequency = CPUFREQ_TABLE_END; + + ret = clk_register(clkp); + } + + return ret; +} + #ifdef CONFIG_SH_CLK_CPG_LEGACY static struct clk master_clk = { .name = "master_clk",