From patchwork Thu Jun 4 05:31:41 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 27783 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n545XYah011378 for ; Thu, 4 Jun 2009 05:35:01 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750858AbZFDFe5 (ORCPT ); Thu, 4 Jun 2009 01:34:57 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1750923AbZFDFe5 (ORCPT ); Thu, 4 Jun 2009 01:34:57 -0400 Received: from rv-out-0506.google.com ([209.85.198.230]:5683 "EHLO rv-out-0506.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750858AbZFDFe5 (ORCPT ); Thu, 4 Jun 2009 01:34:57 -0400 Received: by rv-out-0506.google.com with SMTP id k40so239618rvb.39 for ; Wed, 03 Jun 2009 22:34:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:date:message-id :subject; bh=RaTgeSWN88kPTHMAs4bHdwqiNT5Zw3aIgFKsqEEeAT8=; b=Q4n5jqK77X5mRfEBWzOvMqBZv+lh7AafZROGSvnz4XcwzXDTFXZuBHOVf1JPrvfzPq yz9mapIxQeoCh3Zu6ZAzeUxQmt9Nv60HmRGHR2qqg4apuk6ahYEXXz1BqydubP6yA/H2 mt9fU+PWroig7GdUY3IW+gPMSVDyFD+mWALxA= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:date:message-id:subject; b=K13yP9gciIoBHLLD4D4tUAVaV9PhNTk1wuT/cD6GDoSPMSY7XAFL5TNumu6pNVrQbs my8fbVjFETq/1Nn9j3KVhuNrQYClaJDXsp998P0xynk3baR4+6VUy8cm//1yctbNaU1R DCLatX95NfCX9EAWURuVclondap4NFMBRX45k= Received: by 10.141.26.19 with SMTP id d19mr1534759rvj.84.1244093697161; Wed, 03 Jun 2009 22:34:57 -0700 (PDT) Received: from rx1.opensource.se (210.5.32.202.bf.2iij.net [202.32.5.210]) by mx.google.com with ESMTPS id g31sm1791265rvb.53.2009.06.03.22.34.54 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 03 Jun 2009 22:34:55 -0700 (PDT) From: Magnus Damm To: linux-sh@vger.kernel.org Cc: Magnus Damm , lethal@linux-sh.org Date: Thu, 04 Jun 2009 14:31:41 +0900 Message-Id: <20090604053141.31218.83540.sendpatchset@rx1.opensource.se> Subject: [PATCH] sh: add enable()/disable()/set_rate() to div6 code Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org From: Magnus Damm This patch updates the div6 clock helper code to add support for enable(), disable() and set_rate() callbacks. Needed by the camera clock enabling board code on Migo-R. Signed-off-by: Magnus Damm --- Tested on Migo-R with rewritten sh7722 clock framework. arch/sh/include/asm/clock.h | 4 +++ arch/sh/kernel/cpu/clock-cpg.c | 44 ++++++++++++++++++++++++++++++++++++++++ arch/sh/kernel/cpu/clock.c | 19 +++++++++++++++++ 3 files changed, 67 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- 0005/arch/sh/include/asm/clock.h +++ work/arch/sh/include/asm/clock.h 2009-06-04 13:49:27.000000000 +0900 @@ -119,6 +119,10 @@ long clk_rate_table_round(struct clk *cl struct cpufreq_frequency_table *freq_table, unsigned long rate); +int clk_rate_table_find(struct clk *clk, + struct cpufreq_frequency_table *freq_table, + unsigned long rate); + #define SH_CLK_MSTP32(_name, _id, _parent, _enable_reg, \ _enable_bit, _flags) \ { \ --- 0005/arch/sh/kernel/cpu/clock-cpg.c +++ work/arch/sh/kernel/cpu/clock-cpg.c 2009-06-04 13:56:11.000000000 +0900 @@ -68,9 +68,53 @@ static unsigned long sh_clk_div6_recalc( return clk->freq_table[idx].frequency; } +static int sh_clk_div6_set_rate(struct clk *clk, + unsigned long rate, int algo_id) +{ + unsigned long value; + int idx; + + idx = clk_rate_table_find(clk, clk->freq_table, rate); + if (idx < 0) + return idx; + + value = __raw_readl(clk->enable_reg); + value &= ~0x3f; + value |= idx; + __raw_writel(value, clk->enable_reg); + return 0; +} + +static int sh_clk_div6_enable(struct clk *clk) +{ + unsigned long value; + int ret; + + ret = sh_clk_div6_set_rate(clk, clk->rate, 0); + if (ret == 0) { + value = __raw_readl(clk->enable_reg); + value &= ~0x100; /* clear stop bit to enable clock */ + __raw_writel(value, clk->enable_reg); + } + return ret; +} + +static void sh_clk_div6_disable(struct clk *clk) +{ + unsigned long value; + + value = __raw_readl(clk->enable_reg); + value |= 0x100; /* stop clock */ + value |= 0x3f; /* VDIV bits must be non-zero, overwrite divider */ + __raw_writel(value, clk->enable_reg); +} + static struct clk_ops sh_clk_div6_clk_ops = { .recalc = sh_clk_div6_recalc, .round_rate = sh_clk_div_round_rate, + .set_rate = sh_clk_div6_set_rate, + .enable = sh_clk_div6_enable, + .disable = sh_clk_div6_disable, }; int __init sh_clk_div6_register(struct clk *clks, int nr) --- 0001/arch/sh/kernel/cpu/clock.c +++ work/arch/sh/kernel/cpu/clock.c 2009-06-04 13:58:42.000000000 +0900 @@ -111,6 +111,25 @@ long clk_rate_table_round(struct clk *cl return rate_best_fit; } +int clk_rate_table_find(struct clk *clk, + struct cpufreq_frequency_table *freq_table, + unsigned long rate) +{ + int i; + + for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) { + unsigned long freq = freq_table[i].frequency; + + if (freq == CPUFREQ_ENTRY_INVALID) + continue; + + if (freq == rate) + return i; + } + + return -ENOENT; +} + /* Used for clocks that always have same value as the parent clock */ unsigned long followparent_recalc(struct clk *clk) {