From patchwork Mon Nov 30 19:58:24 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Fleming X-Patchwork-Id: 63764 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id nAUJwTKN013448 for ; Mon, 30 Nov 2009 19:58:29 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752709AbZK3T6W (ORCPT ); Mon, 30 Nov 2009 14:58:22 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1752812AbZK3T6W (ORCPT ); Mon, 30 Nov 2009 14:58:22 -0500 Received: from 124x34x33x190.ap124.ftth.ucom.ne.jp ([124.34.33.190]:54943 "EHLO master.linux-sh.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752709AbZK3T6V (ORCPT ); Mon, 30 Nov 2009 14:58:21 -0500 Received: from localhost (unknown [127.0.0.1]) by master.linux-sh.org (Postfix) with ESMTP id E24F96375A; Mon, 30 Nov 2009 19:57:24 +0000 (UTC) X-Virus-Scanned: amavisd-new at linux-sh.org Received: from master.linux-sh.org ([127.0.0.1]) by localhost (master.linux-sh.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id CTOAcjAtvT9J; Tue, 1 Dec 2009 04:57:24 +0900 (JST) Received: from localhost (82-38-64-26.cable.ubr06.brad.blueyonder.co.uk [82.38.64.26]) by master.linux-sh.org (Postfix) with ESMTP id DB82163758; Tue, 1 Dec 2009 04:57:23 +0900 (JST) Date: Mon, 30 Nov 2009 19:58:24 +0000 From: Matt Fleming To: Kuninori Morimoto Cc: Paul Mundt , Linux-SH Subject: Re: [PATCH] sh: mach-ecovec24: update ecovec24 defconfig Message-ID: <20091130195824.GA26460@console-pimps.org> References: <20091130025618.GB7217@linux-sh.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.19 (2009-01-05) Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c index 6bfd08d..8440b12 100644 --- a/arch/sh/mm/cache-sh4.c +++ b/arch/sh/mm/cache-sh4.c @@ -89,6 +89,8 @@ static inline void flush_cache_one(unsigned long start, unsigned long phys) { unsigned long flags, exec_offset = 0; + WARN_ON(!(phys >= __MEMORY_START && phys < __MEMORY_START + __MEMORY_SIZE)); + /* * All types of SH-4 require PC to be uncached to operate on the I-cache. * Some types of SH-4 require PC to be uncached to operate on the D-cache.