diff mbox

[v4,3/3] ARM: shmobile: henninger: enable internal PCI

Message ID 201406242213.39873.sergei.shtylyov@cogentembedded.com (mailing list archive)
State Accepted
Commit 83ccfa8d0c6a734720ed8cd23b97256ffcae156a
Headers show

Commit Message

Sergei Shtylyov June 24, 2014, 6:13 p.m. UTC 
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers attached to
them.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
Changes in version 4:
- moved the PCI bridge nodes before PCIe clock/bridge nodes.

Changes in version 3:
- refreshed the patch.

 arch/arm/boot/dts/r8a7791-henninger.dts |   22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

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diff mbox

Patch

Index: renesas/arch/arm/boot/dts/r8a7791-henninger.dts
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7791-henninger.dts
+++ renesas/arch/arm/boot/dts/r8a7791-henninger.dts
@@ -125,6 +125,16 @@ 
 				 "msiof0_tx";
 		renesas,function = "msiof0";
 	};
+
+	usb0_pins: usb0 {
+		renesas,groups = "usb0";
+		renesas,function = "usb0";
+	};
+
+	usb1_pins: usb1 {
+		renesas,groups = "usb1";
+		renesas,function = "usb1";
+	};
 };
 
 &scif0 {
@@ -231,6 +241,18 @@ 
 	};
 };
 
+&pci0 {
+	status = "okay";
+	pinctrl-0 = <&usb0_pins>;
+	pinctrl-names = "default";
+};
+
+&pci1 {
+	status = "okay";
+	pinctrl-0 = <&usb1_pins>;
+	pinctrl-names = "default";
+};
+
 &pcie_bus_clk {
 	status = "okay";
 };