From patchwork Fri Aug 28 00:52:34 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 7089111 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 55E409F358 for ; Fri, 28 Aug 2015 00:52:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 750EC20A05 for ; Fri, 28 Aug 2015 00:52:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 71508209FF for ; Fri, 28 Aug 2015 00:52:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751150AbbH1Awh (ORCPT ); Thu, 27 Aug 2015 20:52:37 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:36657 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751030AbbH1Awg (ORCPT ); Thu, 27 Aug 2015 20:52:36 -0400 Received: from reginn.isobedori.kobe.vergenet.net (p7129-ipbfp904kobeminato.hyogo.ocn.ne.jp [118.10.130.129]) by kirsty.vergenet.net (Postfix) with ESMTPA id 3492E25B73F; Fri, 28 Aug 2015 10:52:34 +1000 (AEST) Received: by reginn.isobedori.kobe.vergenet.net (Postfix, from userid 7100) id 6F43094023F; Fri, 28 Aug 2015 09:52:34 +0900 (JST) Date: Fri, 28 Aug 2015 09:52:34 +0900 From: Simon Horman To: Ulrich Hecht Cc: SH-Linux , Yoshihiro Shimoda , Magnus Damm , Sergei Shtylyov Subject: Re: [PATCH/RFC 01/10] arm64: dts: r8a7795: add GPIO nodes Message-ID: <20150828005234.GA591@verge.net.au> References: <1440667450-3513-1-git-send-email-horms+renesas@verge.net.au> <1440667450-3513-2-git-send-email-horms+renesas@verge.net.au> <20150828002048.GA7357@verge.net.au> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20150828002048.GA7357@verge.net.au> Organisation: Horms Solutions Ltd. User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Fri, Aug 28, 2015 at 09:20:53AM +0900, Simon Horman wrote: > On Thu, Aug 27, 2015 at 12:16:46PM +0200, Ulrich Hecht wrote: > > Thanks for the patch. > > You are welcome. > > I'll update my local copy with your suggestions regarding clocks. > I plan to replace that with a version you post whenever that occurs. For reference this is what I now have. Light testing indicates that the driver is initialised correctly, though that was also the case before when the clocks were wrong. From: Takeshi Kihara Subject: [PATCH] arm64: dts: r8a7795: add GPIO clocks Signed-off-by: Takeshi Kihara [horms: moved into clock node; removed non-clock nodes; updated changelog; used R8A7795 as prefix for clock defines] Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 27 +++++++++++++++++++++++++++ include/dt-bindings/clock/r8a7795-clock.h | 8 ++++++++ 2 files changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 5ee10c375190..9fba8be62025 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -70,6 +70,14 @@ #clock-cells = <1>; ranges; + cp_clk: cp_clk { + compatible = "fixed-factor-clock"; + clocks = <&extal_clk>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + }; + s3d4_clk: s3d4 { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7795_CLK_PLL1>; @@ -114,6 +122,25 @@ R8A7795_CLK_EHCI2>; clock-output-names = "hsusb", "ehci0", "ehci1", "ehci2"; }; + + mstp9_clks: mstp9_clks@e6150994 { + compatible = "renesas,r8a7795-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; + clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, + <&cp_clk>, <&cp_clk>, <&cp_clk>, + <&cp_clk>, <&cp_clk>; + #clock-cells = <1>; + clock-indices = < + R8A7795_CLK_GPIO7 R8A7795_CLK_GPIO6 + R8A7795_CLK_GPIO5 R8A7795_CLK_GPIO4 + R8A7795_CLK_GPIO3 R8A7795_CLK_GPIO2 + R8A7795_CLK_GPIO1 R8A7795_CLK_GPIO0 + >; + clock-output-names = + "gpio7", "gpio6", "gpio5", "gpio4", + "gpio3", "gpio2", "gpio1", "gpio0"; + }; }; }; diff --git a/include/dt-bindings/clock/r8a7795-clock.h b/include/dt-bindings/clock/r8a7795-clock.h index 2bd9d934e341..5ca06876902f 100644 --- a/include/dt-bindings/clock/r8a7795-clock.h +++ b/include/dt-bindings/clock/r8a7795-clock.h @@ -37,6 +37,14 @@ /* MSTP8 */ /* MSTP9 */ +#define R8A7795_CLK_GPIO0 12 +#define R8A7795_CLK_GPIO1 11 +#define R8A7795_CLK_GPIO2 10 +#define R8A7795_CLK_GPIO3 9 +#define R8A7795_CLK_GPIO4 8 +#define R8A7795_CLK_GPIO5 7 +#define R8A7795_CLK_GPIO6 6 +#define R8A7795_CLK_GPIO7 5 /* MSTP10 */