From patchwork Mon Aug 31 06:29:52 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 7098551 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C116B9F36E for ; Mon, 31 Aug 2015 06:25:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B2C97206A1 for ; Mon, 31 Aug 2015 06:25:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A1920204EB for ; Mon, 31 Aug 2015 06:25:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751702AbbHaGZl (ORCPT ); Mon, 31 Aug 2015 02:25:41 -0400 Received: from mail-pa0-f46.google.com ([209.85.220.46]:33505 "EHLO mail-pa0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750912AbbHaGZk (ORCPT ); Mon, 31 Aug 2015 02:25:40 -0400 Received: by padhy3 with SMTP id hy3so23847737pad.0 for ; Sun, 30 Aug 2015 23:25:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=qJupg628qhSwpyDjEmskmSrOqP+nxlWsxyI/upNTNpk=; b=FGzkSk7UNOMa8Sz7adj2lYYvk/KsvvS5PKJ5ra8LT139Rr8llOiUJdn+574BLe3Ad/ gTTvzy/7PmCxIf3ggxjK3AEPebz7xeQ0ot22joMGl8m5mlOBqgwA1E/d56Qw4d/JHImO PkFM8EhhG2lGNyyFk6+TeinMqMaLwODFG1SjVB+ePAp2W3zYWzcErM9UEjsfydCgH24P QZO8BzoWDZb3lBooG3+xgHBjb4JtWEgtZLoCkyZp1CeMGgd2fTsdI6HzBzTEPLV96Zyr pju+076NmfQLW4O6/UfIH65c2BEu5Zffgka05+EN6QqQv0BHjsULgonZt4xOxBc/1pL0 mBlg== X-Received: by 10.66.148.6 with SMTP id to6mr34483001pab.132.1441002340368; Sun, 30 Aug 2015 23:25:40 -0700 (PDT) Received: from [127.0.0.1] (s214090.ppp.asahi-net.or.jp. [220.157.214.90]) by smtp.gmail.com with ESMTPSA id la4sm13161205pbc.76.2015.08.30.23.25.36 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 30 Aug 2015 23:25:38 -0700 (PDT) From: Magnus Damm To: Magnus Damm , linux-sh@vger.kernel.org Cc: takeshi.kihara.df@renesas.com, kuninori.morimoto.gx@renesas.com, gaku.inami.xw@bp.renesas.com, yoshihiro.shimoda.uh@renesas.com, hisao.munakata.vt@renesas.com, toshiaki.komatsu.ud@renesas.com, yusuke.goda.sx@renesas.com, horms@verge.net.au, geert@linux-m68k.org, laurent.pinchart@ideasonboard.com, Magnus Damm , yoshiyuki.ito.ub@renesas.com Date: Mon, 31 Aug 2015 15:29:52 +0900 Message-Id: <20150831062952.24004.17072.sendpatchset@little-apple> In-Reply-To: <20150831062907.24004.79614.sendpatchset@little-apple> References: <20150831062907.24004.79614.sendpatchset@little-apple> Subject: [PATCH v8 04/07] arm64: renesas: r8a7795 dtsi: Add all SCIF nodes Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Geert Uytterhoeven Add the device nodes for all R-Car H3 SCIF serial ports, incl. clocks, clock domain, and dma properties. Signed-off-by: Geert Uytterhoeven Signed-off-by: Kuninori Morimoto Signed-off-by: Gaku Inami Signed-off-by: Magnus Damm Acked-by: Laurent Pinchart --- Based on: [PATCH 9/25] arm64: renesas: r8a7795: Add SCIF2 support [PATCH 1/6] arm64: renesas: r8a7795 dtsi: Mark scif2 disabled [PATCH 3/6] arm64: renesas: r8a7795 dtsi: Add all SCIF nodes Changes: (Magnus Damm ) - Folded together above SCIF2 patches - Added SCIF2 DMA bits - Got rid of clock-output-names - Replaced renesas,clock-indices with clock-indices TODO: - Double check if R-Car H3 SCIF2 really has DMA support or not arch/arm64/boot/dts/renesas/r8a7795.dtsi | 105 +++++++++++++++++++++++++++++ include/dt-bindings/clock/r8a7795-clock.h | 6 + 2 files changed, 111 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- 0014/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ work/arch/arm64/boot/dts/renesas/r8a7795.dtsi 2015-08-29 18:25:06.922366518 +0900 @@ -231,6 +231,11 @@ }; cpg_clocks: cpg_clocks@e6150000 { + #address-cells = <2>; + #size-cells = <2>; + #clock-cells = <1>; + ranges; + compatible = "renesas,r8a7795-cpg-clocks", "renesas,rcar-gen3-cpg-clocks"; reg = <0 0xe6150000 0 0x1000>; @@ -241,6 +246,34 @@ R8A7795_CLK_PLL3 R8A7795_CLK_PLL4 >; #power-domain-cells = <0>; + + mstp2_clks: mstp2_clks@e6150138 { + compatible = + "renesas,r8a7795-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150138 0 4>, + <0 0xe6150040 0 4>; + clocks = <&s3d4_clk>, <&s3d4_clk>, + <&s3d4_clk>, <&s3d4_clk>, + <&s3d4_clk>; + #clock-cells = <1>; + clock-indices = < + R8A7795_CLK_SCIF5 + R8A7795_CLK_SCIF4 + R8A7795_CLK_SCIF3 + R8A7795_CLK_SCIF1 + R8A7795_CLK_SCIF0 + >; + }; + + mstp3_clks: mstp3_clks@e615013c { + compatible = "renesas,r8a7795-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; + clocks = <&s3d4_clk>; + #clock-cells = <1>; + clock-indices = ; + }; }; }; @@ -255,5 +288,77 @@ dmac2: dma-controller@e7310000 { /* Empty node for now */ }; + + scif0: serial@e6e60000 { + compatible = "renesas,scif-r8a7795", "renesas,scif"; + reg = <0 0xe6e60000 0 64>; + interrupts = ; + clocks = <&mstp2_clks R8A7795_CLK_SCIF0>; + clock-names = "sci_ick"; + dmas = <&dmac1 0x51>, <&dmac1 0x50>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + scif1: serial@e6e68000 { + compatible = "renesas,scif-r8a7795", "renesas,scif"; + reg = <0 0xe6e68000 0 64>; + interrupts = ; + clocks = <&mstp2_clks R8A7795_CLK_SCIF1>; + clock-names = "sci_ick"; + dmas = <&dmac1 0x53>, <&dmac1 0x52>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + scif2: serial@e6e88000 { + compatible = "renesas,scif-r8a7795", "renesas,scif"; + reg = <0 0xe6e88000 0 64>; + interrupts = ; + clocks = <&mstp3_clks R8A7795_CLK_SCIF2>; + clock-names = "sci_ick"; + dmas = <&dmac0 0x55>, <&dmac0 0x54>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + scif3: serial@e6c50000 { + compatible = "renesas,scif-r8a7795", "renesas,scif"; + reg = <0 0xe6c50000 0 64>; + interrupts = ; + clocks = <&mstp2_clks R8A7795_CLK_SCIF3>; + clock-names = "sci_ick"; + dmas = <&dmac0 0x57>, <&dmac0 0x56>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + scif4: serial@e6c40000 { + compatible = "renesas,scif-r8a7795", "renesas,scif"; + reg = <0 0xe6c40000 0 64>; + interrupts = ; + clocks = <&mstp2_clks R8A7795_CLK_SCIF4>; + clock-names = "sci_ick"; + dmas = <&dmac0 0x59>, <&dmac0 0x58>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + scif5: serial@e6f30000 { + compatible = "renesas,scif-r8a7795", "renesas,scif"; + reg = <0 0xe6f30000 0 64>; + interrupts = ; + clocks = <&mstp2_clks R8A7795_CLK_SCIF5>; + clock-names = "sci_ick"; + dmas = <&dmac1 0x5b>, <&dmac1 0x5a>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; }; }; --- 0012/include/dt-bindings/clock/r8a7795-clock.h +++ work/include/dt-bindings/clock/r8a7795-clock.h 2015-08-29 18:22:14.282366518 +0900 @@ -22,8 +22,14 @@ /* MSTP1 */ /* MSTP2 */ +#define R8A7795_CLK_SCIF5 2 +#define R8A7795_CLK_SCIF4 3 +#define R8A7795_CLK_SCIF3 4 +#define R8A7795_CLK_SCIF1 6 +#define R8A7795_CLK_SCIF0 7 /* MSTP3 */ +#define R8A7795_CLK_SCIF2 10 /* MSTP5 */