From patchwork Sat Jan 6 18:53:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 10147995 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 71A1C60153 for ; Sat, 6 Jan 2018 18:55:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5FC5028971 for ; Sat, 6 Jan 2018 18:55:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 541FF28978; Sat, 6 Jan 2018 18:55:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ED73128971 for ; Sat, 6 Jan 2018 18:55:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753276AbeAFSzZ (ORCPT ); Sat, 6 Jan 2018 13:55:25 -0500 Received: from mail-lf0-f67.google.com ([209.85.215.67]:34327 "EHLO mail-lf0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753202AbeAFSzX (ORCPT ); Sat, 6 Jan 2018 13:55:23 -0500 Received: by mail-lf0-f67.google.com with SMTP id h140so8294506lfg.1 for ; Sat, 06 Jan 2018 10:55:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cogentembedded-com.20150623.gappssmtp.com; s=20150623; h=from:message-id:user-agent:date:to:cc:subject:mime-version :content-disposition; bh=jfws87VHyOPa1djOHRv1/nypKVmn4HkWseNt1bKVZaw=; b=G70+qqfNHVwguNwEiBsrGBeoVTzTRp07A5WqkLtBBO256/cYk/oAfLuUgLsQ1RNZH6 K8YfTRZGOUKaIVLSa0owGWHWkmeyJJ2gzLPAlpAOBqeO3E6M8jfDiEb6fuRcqKdSNAr/ /hd242qbNbWlRaZciiFbV7bkljq3e4wlvrAGVbpfkzX8hRtPxqKK9rSFYdxbDPlDS5sT 4KACPZX5+GN6vLPyWBFg5xz+aBhQIg5HRBp7vM85zMF042Dkrk3rRdbaZ6PqF5hq7Ny8 bn6ZKibfceKgqr3ukr0rl5G77IR3x6CjBI5S4rubObrN6jMvcRhvJ4kdj0bIZlvKCQw3 iqXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:message-id:user-agent:date:to:cc:subject :mime-version:content-disposition; bh=jfws87VHyOPa1djOHRv1/nypKVmn4HkWseNt1bKVZaw=; b=hyR9wQCmBjxvWg6rPdmvpp7YVCIYYyAxqZ8kcimBFcbF7Z/mD44Ri8cX1dTwtpKS/P ZUkRuhL2EAm29pn4bCprwqBc88jCggnxP1cgGzafwY7uUAyaekqBBIkggtznXcts5O9j xtMi4f6iTtxEej9wxm2+IUh3yb9WogN3JGpF3LNGCS+XjLLN7UTJE9eULnR7Y7O7+1O5 kEpwjkJdC2HHtyWxHQzbUoYrYWo2Y/zXN062IMkC0EFpdB/r547VTFWplnM7sCb2LZdU 4gmGjcyCAExRaFB1A85ATC0W38fbwwb9fOhwYHoIB53WPDP0jVTQuY6aF0IyulFHL1Fc P2pA== X-Gm-Message-State: AKwxytfGoFmcJlf13/s1zYv65VgA5Au9q4RSITtnnmr2H2bvZK23zAPH mGxuRlhIkzqfHnPdksxoux4g/VKjm+0= X-Google-Smtp-Source: ACJfBou5cghSLDllRCWEAjMnJPp6mKvrRBTxq1W3E+4UeumY9ERZDV7Q9KiyuQbS5CFhKcECeb9Qpw== X-Received: by 10.25.113.4 with SMTP id m4mr3943839lfc.70.1515264921890; Sat, 06 Jan 2018 10:55:21 -0800 (PST) Received: from wasted.cogentembedded.com ([31.173.85.97]) by smtp.gmail.com with ESMTPSA id g74sm1540520lje.52.2018.01.06.10.55.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 06 Jan 2018 10:55:21 -0800 (PST) From: Sergei Shtylyov X-Google-Original-From: "Sergei Shtylyov" Received: by wasted.cogentembedded.com (sSMTP sendmail emulation); Sat, 06 Jan 2018 21:55:19 +0300 Message-Id: <20180106185519.041220394@cogentembedded.com> User-Agent: quilt/0.64 Date: Sat, 06 Jan 2018 21:53:27 +0300 To: Yoshinori Sato , Rich Felker , linux-sh@vger.kernel.org Cc: netdev@vger.kernel.org, Sergei Shtylyov Subject: [PATCH 2/2] SolutionEngine771x: add Ether TSU resource MIME-Version: 1.0 Content-Disposition: inline; filename=SolutionEngine771x-add-Ether-TSU-resource-v2.patch Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP After the Ether platform data is fixed, the driver probe() method would still fail since the 'struct sh_eth_cpu_data' corresponding to SH771x indicates the presence of TSU but the memory resource for it is absent. Add the missing TSU resource to both Ether devices and fix the harmless off-by-one error in the main memory resources, while at it... Fixes: 4986b996882d ("net: sh_eth: remove the SH_TSU_ADDR") Signed-off-by: Sergei Shtylyov --- Changes in version 2: - corrected the TSU resource size. arch/sh/boards/mach-se/770x/setup.c | 14 ++++++++++++-- arch/sh/include/mach-se/mach/se.h | 1 + 2 files changed, 13 insertions(+), 2 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Index: linux/arch/sh/boards/mach-se/770x/setup.c =================================================================== --- linux.orig/arch/sh/boards/mach-se/770x/setup.c +++ linux/arch/sh/boards/mach-se/770x/setup.c @@ -124,10 +124,15 @@ static struct sh_eth_plat_data sh_eth_pl static struct resource sh_eth0_resources[] = { [0] = { .start = SH_ETH0_BASE, - .end = SH_ETH0_BASE + 0x1B8, + .end = SH_ETH0_BASE + 0x1B8 - 1, .flags = IORESOURCE_MEM, }, [1] = { + .start = SH_TSU_BASE, + .end = SH_TSU_BASE + 0x200 - 1, + .flags = IORESOURCE_MEM, + }, + [2] = { .start = SH_ETH0_IRQ, .end = SH_ETH0_IRQ, .flags = IORESOURCE_IRQ, @@ -147,10 +152,15 @@ static struct platform_device sh_eth0_de static struct resource sh_eth1_resources[] = { [0] = { .start = SH_ETH1_BASE, - .end = SH_ETH1_BASE + 0x1B8, + .end = SH_ETH1_BASE + 0x1B8 - 1, .flags = IORESOURCE_MEM, }, [1] = { + .start = SH_TSU_BASE, + .end = SH_TSU_BASE + 0x200 - 1, + .flags = IORESOURCE_MEM, + }, + [2] = { .start = SH_ETH1_IRQ, .end = SH_ETH1_IRQ, .flags = IORESOURCE_IRQ, Index: linux/arch/sh/include/mach-se/mach/se.h =================================================================== --- linux.orig/arch/sh/include/mach-se/mach/se.h +++ linux/arch/sh/include/mach-se/mach/se.h @@ -100,6 +100,7 @@ /* Base address */ #define SH_ETH0_BASE 0xA7000000 #define SH_ETH1_BASE 0xA7000400 +#define SH_TSU_BASE 0xA7000800 /* PHY ID */ #if defined(CONFIG_CPU_SUBTYPE_SH7710) # define PHY_ID 0x00