From patchwork Mon Mar 26 21:27:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Petazzoni X-Patchwork-Id: 10308775 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6C875605D2 for ; Mon, 26 Mar 2018 21:27:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6558C21327 for ; Mon, 26 Mar 2018 21:27:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5A437298AB; Mon, 26 Mar 2018 21:27:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E6FE821327 for ; Mon, 26 Mar 2018 21:27:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751730AbeCZV1a (ORCPT ); Mon, 26 Mar 2018 17:27:30 -0400 Received: from mail.bootlin.com ([62.4.15.54]:56303 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751739AbeCZV13 (ORCPT ); Mon, 26 Mar 2018 17:27:29 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id C8E8C208B2; Mon, 26 Mar 2018 23:27:27 +0200 (CEST) Received: from localhost (LFbn-TOU-1-408-85.w86-206.abo.wanadoo.fr [86.206.234.85]) by mail.bootlin.com (Postfix) with ESMTPSA id 6EF7820879; Mon, 26 Mar 2018 23:27:17 +0200 (CEST) From: Thomas Petazzoni To: Yoshinori Sato , Rich Felker , linux-sh@vger.kernel.org Cc: Thomas Petazzoni Subject: [PATCH 1/2] arch/sh: make l2_cache_init() return an integer Date: Mon, 26 Mar 2018 23:27:14 +0200 Message-Id: <20180326212715.12907-2-thomas.petazzoni@bootlin.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180326212715.12907-1-thomas.petazzoni@bootlin.com> References: <20180326212715.12907-1-thomas.petazzoni@bootlin.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On some SH platforms, enabling the L2 cache requires changing bits in the CCR register. However, this register is already being changed by the cache_init() function in arch/sh/kernel/cpu/init.c function, so the l2_cache_init() function called by cache_init() cannot change CCR as well. In order to solve this, we change l2_cache_init() into a function that returns a bit mask that will be OR'ed into the value written to the CCR register by cache_init(). It won't support all possible situations, but will be good enough to enable L2 on SH7786. Signed-off-by: Thomas Petazzoni --- arch/sh/kernel/cpu/init.c | 4 ++-- arch/sh/kernel/cpu/sh4a/setup-sh7723.c | 3 ++- arch/sh/kernel/cpu/sh4a/setup-sh7724.c | 3 ++- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c index c4f01c5c8736..eb6775cdb9fc 100644 --- a/arch/sh/kernel/cpu/init.c +++ b/arch/sh/kernel/cpu/init.c @@ -99,7 +99,7 @@ static void expmask_init(void) #endif /* 2nd-level cache init */ -void __attribute__ ((weak)) l2_cache_init(void) +int __attribute__ ((weak)) l2_cache_init(void) { } @@ -187,7 +187,7 @@ static void cache_init(void) flags &= ~CCR_CACHE_ENABLE; #endif - l2_cache_init(); + flags |= l2_cache_init(); __raw_writel(flags, SH_CCR); back_to_cached(); diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c index 1c1b3c469831..c6c29206dee7 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c @@ -421,10 +421,11 @@ void __init plat_early_device_setup(void) #define RAMCR_CACHE_L2E 0x0001 #define L2_CACHE_ENABLE (RAMCR_CACHE_L2E|RAMCR_CACHE_L2FC) -void l2_cache_init(void) +int l2_cache_init(void) { /* Enable L2 cache */ __raw_writel(L2_CACHE_ENABLE, RAMCR); + return 0; } enum { diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c index c20258b18775..ee9f5209adf0 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c @@ -841,10 +841,11 @@ void __init plat_early_device_setup(void) #define RAMCR_CACHE_L2E 0x0001 #define L2_CACHE_ENABLE (RAMCR_CACHE_L2E|RAMCR_CACHE_L2FC) -void l2_cache_init(void) +int l2_cache_init(void) { /* Enable L2 cache */ __raw_writel(L2_CACHE_ENABLE, RAMCR); + return 0; } enum {